From 1f77204e11f8b9e5d77d65197a03b702c50ea29b Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Tue, 17 May 2022 11:54:29 +0300 Subject: [PATCH] dt-bindings: net: adin: document phy clock output properties The ADIN1300 supports generating certain clocks on its GP_CLK pin, as well as providing the reference clock on CLK25_REF. Add DT properties to configure both pins. Technically the phy also supports a recovered 125MHz clock for synchronous ethernet. However SyncE should be configured dynamically at runtime, so it is explicitly omitted in this binding. Signed-off-by: Josua Mayer Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jakub Kicinski --- .../devicetree/bindings/net/adi,adin.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index 1129f2b58e98..77750df0c2c4 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -36,6 +36,21 @@ properties: enum: [ 4, 8, 12, 16, 20, 24 ] default: 8 + adi,phy-output-clock: + description: Select clock output on GP_CLK pin. Two clocks are available: + A 25MHz reference and a free-running 125MHz. + The phy can alternatively automatically switch between the reference and + the 125MHz clocks based on its internal state. + $ref: /schemas/types.yaml#/definitions/string + enum: + - 25mhz-reference + - 125mhz-free-running + - adaptive-free-running + + adi,phy-output-reference-clock: + description: Enable 25MHz reference clock output on CLK25_REF pin. + type: boolean + unevaluatedProperties: false examples: