From f905293d655cbb8be833261ef390aaba71b44307 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 11 Jul 2017 14:26:01 +0200 Subject: [PATCH 1/2] clk: gemini: Fix reset regression commit e2860e1f62f2 ("serial: 8250_of: Add reset support") introduced reset support for the 8250_of driver. However it unconditionally uses the assert/deassert pair to deassert reset on the device at probe and assert it at remove. This does not work with systems that have a self-deasserting reset controller, such as Gemini, that recently added a reset controller. As a result, the console will not probe on the Gemini with this message: Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled of_serial: probe of 42000000.serial failed with error -524 This (-ENOTSUPP) is the error code returned by the deassert() operation on self-deasserting reset controllers. To work around this, implement dummy .assert() and .deassert() operations in the Gemini combined clock and reset controller. This fixes the issue on this system. Cc: Joel Stanley Cc: Greg Kroah-Hartman Cc: linux-serial@vger.kernel.org Fixes: e2860e1f62f2 ("serial: 8250_of: Add reset support") Signed-off-by: Linus Walleij Acked-by: Philipp Zabel Signed-off-by: Stephen Boyd --- drivers/clk/clk-gemini.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/clk/clk-gemini.c b/drivers/clk/clk-gemini.c index c391a49aaaff..b4cf2f699a21 100644 --- a/drivers/clk/clk-gemini.c +++ b/drivers/clk/clk-gemini.c @@ -237,6 +237,18 @@ static int gemini_reset(struct reset_controller_dev *rcdev, BIT(GEMINI_RESET_CPU1) | BIT(id)); } +static int gemini_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return 0; +} + +static int gemini_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return 0; +} + static int gemini_reset_status(struct reset_controller_dev *rcdev, unsigned long id) { @@ -253,6 +265,8 @@ static int gemini_reset_status(struct reset_controller_dev *rcdev, static const struct reset_control_ops gemini_reset_ops = { .reset = gemini_reset, + .assert = gemini_reset_assert, + .deassert = gemini_reset_deassert, .status = gemini_reset_status, }; From d31fd43c0f9a41e2678a1e78c0f22f0384c6edd3 Mon Sep 17 00:00:00 2001 From: Carlo Caione Date: Fri, 14 Jul 2017 10:23:56 +0200 Subject: [PATCH 2/2] clk: x86: Do not gate clocks enabled by the firmware Read the enable register to determine if the clock is already in use by the firmware. In this case avoid gating the clock. Tested-by: Enric Balletbo i Serra Acked-by: Andy Shevchenko Acked-by: Darren Hart (VMware) Signed-off-by: Carlo Caione Fixes: 282a4e4ce5f9 ("platform/x86: Enable Atom PMC platform clocks") Signed-off-by: Stephen Boyd --- drivers/clk/x86/clk-pmc-atom.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c index f99abc1106f0..08ef69945ffb 100644 --- a/drivers/clk/x86/clk-pmc-atom.c +++ b/drivers/clk/x86/clk-pmc-atom.c @@ -186,6 +186,13 @@ static struct clk_plt *plt_clk_register(struct platform_device *pdev, int id, pclk->reg = base + PMC_CLK_CTL_OFFSET + id * PMC_CLK_CTL_SIZE; spin_lock_init(&pclk->lock); + /* + * If the clock was already enabled by the firmware mark it as critical + * to avoid it being gated by the clock framework if no driver owns it. + */ + if (plt_clk_is_enabled(&pclk->hw)) + init.flags |= CLK_IS_CRITICAL; + ret = devm_clk_hw_register(&pdev->dev, &pclk->hw); if (ret) { pclk = ERR_PTR(ret);