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drm/i915: Model PSR AUX register selection more like the normal AUX code

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v2: Split up the ctl vs. data reg handling like in the normal AUX code

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1447266856-30249-8-git-send-email-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2015-11-11 20:34:16 +02:00
parent 443a389f43
commit 1f38089cb7
1 changed files with 21 additions and 6 deletions
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27
drivers/gpu/drm/i915/intel_psr.c
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@ -151,13 +151,31 @@ static void vlv_psr_enable_sink(struct intel_dp *intel_dp)
DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE); DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
} }
static uint32_t psr_aux_ctl_reg(struct drm_i915_private *dev_priv,
enum port port)
{
if (INTEL_INFO(dev_priv)->gen >= 9)
return DP_AUX_CH_CTL(port);
else
return EDP_PSR_AUX_CTL;
}
static uint32_t psr_aux_data_reg(struct drm_i915_private *dev_priv,
enum port port, int index)
{
if (INTEL_INFO(dev_priv)->gen >= 9)
return DP_AUX_CH_DATA(port, index);
else
return EDP_PSR_AUX_DATA(index);
}
static void hsw_psr_enable_sink(struct intel_dp *intel_dp) static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
{ {
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = dig_port->base.base.dev; struct drm_device *dev = dig_port->base.base.dev;
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
uint32_t aux_clock_divider; uint32_t aux_clock_divider;
uint32_t aux_data_reg, aux_ctl_reg; uint32_t aux_ctl_reg;
int precharge = 0x3; int precharge = 0x3;
static const uint8_t aux_msg[] = { static const uint8_t aux_msg[] = {
[0] = DP_AUX_NATIVE_WRITE << 4, [0] = DP_AUX_NATIVE_WRITE << 4,
@ -182,14 +200,11 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF, DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
DP_AUX_FRAME_SYNC_ENABLE); DP_AUX_FRAME_SYNC_ENABLE);
aux_data_reg = (INTEL_INFO(dev)->gen >= 9) ? aux_ctl_reg = psr_aux_ctl_reg(dev_priv, port);
DP_AUX_CH_DATA(port, 0) : EDP_PSR_AUX_DATA(0);
aux_ctl_reg = (INTEL_INFO(dev)->gen >= 9) ?
DP_AUX_CH_CTL(port) : EDP_PSR_AUX_CTL;
/* Setup AUX registers */ /* Setup AUX registers */
for (i = 0; i < sizeof(aux_msg); i += 4) for (i = 0; i < sizeof(aux_msg); i += 4)
I915_WRITE(aux_data_reg + i, I915_WRITE(psr_aux_data_reg(dev_priv, port, i >> 2),
intel_dp_pack_aux(&aux_msg[i], sizeof(aux_msg) - i)); intel_dp_pack_aux(&aux_msg[i], sizeof(aux_msg) - i));
if (INTEL_INFO(dev)->gen >= 9) { if (INTEL_INFO(dev)->gen >= 9) {