forked from Minki/linux
ASoC: Intel: Skylake: Add library loading support
The library load is added as one of the ops in skl_dsp_fw_ops(). The manifest load gives the files to be loaded which are loaded during the fw_init() Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Kranthi G <gudishax.kranthikumar@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -23,6 +23,7 @@
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#include "../common/sst-dsp.h"
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#include "../common/sst-dsp-priv.h"
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#include "skl-sst-ipc.h"
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#include "skl-tplg-interface.h"
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#define BXT_BASEFW_TIMEOUT 3000
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#define BXT_INIT_TIMEOUT 500
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@ -40,11 +41,73 @@
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#define BXT_INSTANCE_ID 0
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#define BXT_BASE_FW_MODULE_ID 0
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#define BXT_ADSP_FW_BIN_HDR_OFFSET 0x2000
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static unsigned int bxt_get_errorcode(struct sst_dsp *ctx)
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{
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return sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE);
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}
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static int
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bxt_load_library(struct sst_dsp *ctx, struct skl_dfw_manifest *minfo)
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{
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struct snd_dma_buffer dmab;
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struct skl_sst *skl = ctx->thread_context;
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const struct firmware *fw = NULL;
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struct firmware stripped_fw;
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int ret = 0, i, dma_id, stream_tag;
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/* library indices start from 1 to N. 0 represents base FW */
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for (i = 1; i < minfo->lib_count; i++) {
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ret = request_firmware(&fw, minfo->lib[i].name, ctx->dev);
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if (ret < 0) {
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dev_err(ctx->dev, "Request lib %s failed:%d\n",
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minfo->lib[i].name, ret);
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return ret;
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}
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if (skl->is_first_boot) {
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ret = snd_skl_parse_uuids(ctx, fw,
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BXT_ADSP_FW_BIN_HDR_OFFSET, i);
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if (ret < 0)
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goto load_library_failed;
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}
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stripped_fw.data = fw->data;
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stripped_fw.size = fw->size;
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skl_dsp_strip_extended_manifest(&stripped_fw);
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stream_tag = ctx->dsp_ops.prepare(ctx->dev, 0x40,
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stripped_fw.size, &dmab);
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if (stream_tag <= 0) {
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dev_err(ctx->dev, "Lib prepare DMA err: %x\n",
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stream_tag);
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ret = stream_tag;
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goto load_library_failed;
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}
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dma_id = stream_tag - 1;
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memcpy(dmab.area, stripped_fw.data, stripped_fw.size);
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ctx->dsp_ops.trigger(ctx->dev, true, stream_tag);
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ret = skl_sst_ipc_load_library(&skl->ipc, dma_id, i);
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if (ret < 0)
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dev_err(ctx->dev, "IPC Load Lib for %s fail: %d\n",
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minfo->lib[i].name, ret);
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ctx->dsp_ops.trigger(ctx->dev, false, stream_tag);
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ctx->dsp_ops.cleanup(ctx->dev, &dmab, stream_tag);
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release_firmware(fw);
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fw = NULL;
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}
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return ret;
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load_library_failed:
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release_firmware(fw);
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return ret;
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}
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/*
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* First boot sequence has some extra steps. Core 0 waits for power
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* status on core 1, so power up core 1 also momentarily, keep it in
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@ -157,8 +220,6 @@ static int sst_transfer_fw_host_dma(struct sst_dsp *ctx)
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return ret;
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}
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#define BXT_ADSP_FW_BIN_HDR_OFFSET 0x2000
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static int bxt_load_base_firmware(struct sst_dsp *ctx)
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{
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struct firmware stripped_fw;
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@ -233,12 +294,23 @@ static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
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int ret;
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struct skl_ipc_dxstate_info dx;
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unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
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struct skl_dfw_manifest *minfo = &skl->manifest;
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if (skl->fw_loaded == false) {
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skl->boot_complete = false;
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ret = bxt_load_base_firmware(ctx);
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if (ret < 0)
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if (ret < 0) {
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dev_err(ctx->dev, "reload fw failed: %d\n", ret);
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return ret;
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}
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if (minfo->lib_count > 1) {
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ret = bxt_load_library(ctx, minfo);
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if (ret < 0) {
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dev_err(ctx->dev, "reload libs failed: %d\n", ret);
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return ret;
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}
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}
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return ret;
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}
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@ -344,6 +416,7 @@ static struct skl_dsp_fw_ops bxt_fw_ops = {
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.set_state_D3 = bxt_set_dsp_D3,
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.load_fw = bxt_load_base_firmware,
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.get_fw_errcode = bxt_get_errorcode,
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.load_library = bxt_load_library,
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};
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static struct sst_ops skl_ops = {
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@ -422,6 +495,13 @@ int bxt_sst_init_fw(struct device *dev, struct skl_sst *ctx)
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skl_dsp_init_core_state(sst);
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if (ctx->manifest.lib_count > 1) {
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ret = sst->fw_ops.load_library(sst, &ctx->manifest);
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if (ret < 0) {
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dev_err(dev, "Load Library failed : %x", ret);
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return ret;
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}
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}
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ctx->is_first_boot = false;
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return 0;
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@ -133,6 +133,8 @@ enum skl_dsp_states {
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struct skl_dsp_fw_ops {
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int (*load_fw)(struct sst_dsp *ctx);
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/* FW module parser/loader */
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int (*load_library)(struct sst_dsp *ctx,
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struct skl_dfw_manifest *minfo);
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int (*parse_fw)(struct sst_dsp *ctx);
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int (*set_state_D0)(struct sst_dsp *ctx, unsigned int core_id);
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int (*set_state_D3)(struct sst_dsp *ctx, unsigned int core_id);
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