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arm64: dts: qcom: align Google CROS EC PWM node name with dtschema

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dtschema expects PWM node name to be a generic "pwm".  This also matches
Devicetree specification requirements about generic node names.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220214081916.162014-4-krzysztof.kozlowski@canonical.com
This commit is contained in:
Krzysztof Kozlowski 2022-02-14 09:19:15 +01:00 committed by Bjorn Andersson
parent d4b341269e
commit 1e49defb86
5 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
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@ -637,7 +637,7 @@
pinctrl-0 = <&ap_ec_int_l>;
spi-max-frequency = <3000000>;
cros_ec_pwm: ec-pwm {
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
};

2
arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r0.dts
View File

@ -705,7 +705,7 @@ ap_ec_spi: &spi8 {
pinctrl-0 = <&ap_ec_int_l>;
spi-max-frequency = <3000000>;
cros_ec_pwm: ec-pwm {
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
};

2
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
View File

@ -421,7 +421,7 @@ ap_ec_spi: &spi10 {
pinctrl-0 = <&ap_ec_int_l>;
spi-max-frequency = <3000000>;
cros_ec_pwm: ec-pwm {
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
};

2
arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi
View File

@ -20,7 +20,7 @@ ap_ec_spi: &spi10 {
pinctrl-0 = <&ap_ec_int_l>;
spi-max-frequency = <3000000>;
cros_ec_pwm: ec-pwm {
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
};

2
arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
View File

@ -708,7 +708,7 @@ ap_ts_i2c: &i2c14 {
pinctrl-0 = <&ec_ap_int_l>;
spi-max-frequency = <3000000>;
cros_ec_pwm: ec-pwm {
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
};