forked from Minki/linux
drm/amdgpu: clear gfxoff feature mask if the asic is not raven
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -95,7 +95,8 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)
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hwmgr->smumgr_funcs = &ci_smu_funcs;
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ci_set_asic_special_caps(hwmgr);
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hwmgr->feature_mask &= ~(PP_VBI_TIME_SUPPORT_MASK |
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PP_ENABLE_GFX_CG_THRU_SMU);
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PP_ENABLE_GFX_CG_THRU_SMU |
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PP_GFXOFF_MASK);
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hwmgr->pp_table_version = PP_TABLE_V0;
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hwmgr->od_enabled = false;
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smu7_init_function_pointers(hwmgr);
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@ -103,9 +104,11 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)
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case AMDGPU_FAMILY_CZ:
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hwmgr->od_enabled = false;
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hwmgr->smumgr_funcs = &smu8_smu_funcs;
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hwmgr->feature_mask &= ~PP_GFXOFF_MASK;
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smu8_init_function_pointers(hwmgr);
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break;
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case AMDGPU_FAMILY_VI:
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hwmgr->feature_mask &= ~PP_GFXOFF_MASK;
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switch (hwmgr->chip_id) {
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case CHIP_TOPAZ:
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hwmgr->smumgr_funcs = &iceland_smu_funcs;
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@ -139,6 +142,7 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)
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smu7_init_function_pointers(hwmgr);
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break;
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case AMDGPU_FAMILY_AI:
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hwmgr->feature_mask &= ~PP_GFXOFF_MASK;
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switch (hwmgr->chip_id) {
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case CHIP_VEGA10:
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hwmgr->smumgr_funcs = &vega10_smu_funcs;
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