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spi: intel: 64k erase is supported from Canon Lake and beyond

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The hardware sequencer in Intel Canon Lake and beyond supports also 64k
erase command. The SPI-NOR core uses SFDP (Serial Flash Discovery
Parameter) to figure out what the chip actually supports and only issues
64k erase if it is supported.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20220816125537.89389-1-mika.westerberg@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Mika Westerberg 2022-08-16 15:55:37 +03:00 committed by Mark Brown
parent 3f03c618be
commit 1d895be13a
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1 changed files with 1 additions and 0 deletions
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drivers/spi/spi-intel.c
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@ -1100,6 +1100,7 @@ static int intel_spi_init(struct intel_spi *ispi)
ispi->pregs = ispi->base + CNL_PR;
ispi->nregions = CNL_FREG_NUM;
ispi->pr_num = CNL_PR_NUM;
erase_64k = true;
break;
default: