forked from Minki/linux
reset: simple: Enable for ASPEED systems
ASPEED BMC SoCs have a reset controller in the LPC IP that can be controlled using this driver to release the UARTs from reset. No special configuration is required, so only the compatible string is added. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@ -83,14 +83,18 @@ config RESET_PISTACHIO
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config RESET_SIMPLE
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bool "Simple Reset Controller Driver" if COMPILE_TEST
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default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX
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default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
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help
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This enables a simple reset controller driver for reset lines that
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that can be asserted and deasserted by toggling bits in a contiguous,
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exclusive register space.
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Currently this driver supports Altera SoCFPGAs, the RCC reset
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controller in STM32 MCUs, Allwinner SoCs, and ZTE's zx2967 family.
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Currently this driver supports:
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- Altera SoCFPGAs
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- ASPEED BMC SoCs
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- RCC reset controller in STM32 MCUs
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- Allwinner SoCs
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- ZTE's zx2967 family
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config RESET_SUNXI
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bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
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@ -125,6 +125,8 @@ static const struct of_device_id reset_simple_dt_ids[] = {
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.data = &reset_simple_active_low },
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{ .compatible = "zte,zx296718-reset",
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.data = &reset_simple_active_low },
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{ .compatible = "aspeed,ast2400-lpc-reset" },
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{ .compatible = "aspeed,ast2500-lpc-reset" },
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{ /* sentinel */ },
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};
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