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Merge series "Some bug fix for lpspi" from Clark Wang <xiaoning.wang@nxp.com>:

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Hi,

This patchset mainly fixes some recently discovered problems about CS for
LPSPI module on i.MX8DXLEVK.

Add the dt-bindings description for the new property.

Clark Wang (4):
  spi: lpspi: Fix kernel warning dump when probe fail after calling
    spi_register
  spi: lpspi: remove unused fsl_lpspi->chipselect
  spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK
  dt-bindings: lpspi: New property in document DT bindings for LPSPI

 .../bindings/spi/spi-fsl-lpspi.yaml           |  7 ++++++
 drivers/spi/spi-fsl-lpspi.c                   | 25 +++++++++++--------
 2 files changed, 21 insertions(+), 11 deletions(-)

--
2.17.1
This commit is contained in:
Mark Brown 2020-07-29 14:51:14 +01:00
commit 1d5cd4e777
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
1 changed files with 14 additions and 11 deletions
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25
drivers/spi/spi-fsl-lpspi.c
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@ -98,6 +98,7 @@ struct fsl_lpspi_data {
struct clk *clk_ipg;
struct clk *clk_per;
bool is_slave;
bool is_only_cs1;
bool is_first_byte;
void *rx_buf;
@ -119,8 +120,6 @@ struct fsl_lpspi_data {
bool usedma;
struct completion dma_rx_completion;
struct completion dma_tx_completion;
int chipselect[];
};
static const struct of_device_id fsl_lpspi_dt_ids[] = {
@ -259,10 +258,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi)
temp |= fsl_lpspi->config.bpw - 1;
temp |= (fsl_lpspi->config.mode & 0x3) << 30;
temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
if (!fsl_lpspi->is_slave) {
temp |= fsl_lpspi->config.prescale << 27;
temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
/*
* Set TCR_CONT will keep SS asserted after current transfer.
* For the first transfer, clear TCR_CONTC to assert SS.
@ -423,7 +421,10 @@ static int fsl_lpspi_setup_transfer(struct spi_controller *controller,
fsl_lpspi->config.mode = spi->mode;
fsl_lpspi->config.bpw = t->bits_per_word;
fsl_lpspi->config.speed_hz = t->speed_hz;
fsl_lpspi->config.chip_select = spi->chip_select;
if (fsl_lpspi->is_only_cs1)
fsl_lpspi->config.chip_select = 1;
else
fsl_lpspi->config.chip_select = spi->chip_select;
if (!fsl_lpspi->config.speed_hz)
fsl_lpspi->config.speed_hz = spi->max_speed_hz;
@ -837,6 +838,8 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
fsl_lpspi = spi_controller_get_devdata(controller);
fsl_lpspi->dev = &pdev->dev;
fsl_lpspi->is_slave = is_slave;
fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,
"fsl,spi-only-use-cs1-sel");
controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
controller->transfer_one = fsl_lpspi_transfer_one;
@ -850,12 +853,6 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
if (!fsl_lpspi->is_slave)
controller->use_gpio_descriptors = true;
ret = devm_spi_register_controller(&pdev->dev, controller);
if (ret < 0) {
dev_err(&pdev->dev, "spi_register_controller error.\n");
goto out_controller_put;
}
init_completion(&fsl_lpspi->xfer_done);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@ -913,6 +910,12 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
if (ret < 0)
dev_err(&pdev->dev, "dma setup error %d, use pio\n", ret);
ret = devm_spi_register_controller(&pdev->dev, controller);
if (ret < 0) {
dev_err(&pdev->dev, "spi_register_controller error.\n");
goto out_pm_get;
}
pm_runtime_mark_last_busy(fsl_lpspi->dev);
pm_runtime_put_autosuspend(fsl_lpspi->dev);