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drm/amd/powerplay: support to get power index for sienna_cichlid

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Add function to get smu power index for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2020-03-13 16:36:08 +08:00 committed by Alex Deucher
parent 1c58d4295b
commit 1d5ca71345
2 changed files with 27 additions and 0 deletions
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21
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
View File

@ -176,6 +176,11 @@ static struct smu_11_0_cmn2aisc_mapping sienna_cichlid_table_map[SMU_TABLE_COUNT
TAB_MAP(PACE),
};
static struct smu_11_0_cmn2aisc_mapping sienna_cichlid_pwr_src_map[SMU_POWER_SOURCE_COUNT] = {
PWR_MAP(AC),
PWR_MAP(DC),
};
static struct smu_11_0_cmn2aisc_mapping sienna_cichlid_workload_map[PP_SMC_POWER_PROFILE_COUNT] = {
WORKLOAD_MAP(PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT, WORKLOAD_PPLIB_DEFAULT_BIT),
WORKLOAD_MAP(PP_SMC_POWER_PROFILE_FULLSCREEN3D, WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT),
@ -246,6 +251,21 @@ static int sienna_cichlid_get_smu_table_index(struct smu_context *smc, uint32_t
return mapping.map_to;
}
static int sienna_cichlid_get_pwr_src_index(struct smu_context *smc, uint32_t index)
{
struct smu_11_0_cmn2aisc_mapping mapping;
if (index >= SMU_POWER_SOURCE_COUNT)
return -EINVAL;
mapping = sienna_cichlid_pwr_src_map[index];
if (!(mapping.valid_mapping)) {
return -EINVAL;
}
return mapping.map_to;
}
static int sienna_cichlid_get_workload_type(struct smu_context *smu, enum PP_SMC_POWER_PROFILE profile)
{
struct smu_11_0_cmn2aisc_mapping mapping;
@ -2185,6 +2205,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.get_smu_clk_index = sienna_cichlid_get_smu_clk_index,
.get_smu_feature_index = sienna_cichlid_get_smu_feature_index,
.get_smu_table_index = sienna_cichlid_get_smu_table_index,
.get_smu_power_index = sienna_cichlid_get_pwr_src_index,
.get_workload_type = sienna_cichlid_get_workload_type,
.get_allowed_feature_mask = sienna_cichlid_get_allowed_feature_mask,
.set_default_dpm_table = sienna_cichlid_set_default_dpm_table,

6
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.h
View File

@ -23,6 +23,12 @@
#ifndef __SIENNA_CICHLID_PPT_H__
#define __SIENNA_CICHLID_PPT_H__
typedef enum {
POWER_SOURCE_AC,
POWER_SOURCE_DC,
POWER_SOURCE_COUNT,
} POWER_SOURCE_e;
extern void sienna_cichlid_set_ppt_funcs(struct smu_context *smu);
#define smnPCIE_LC_SPEED_CNTL 0x11140290