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RISC-V: Typo fixes in image header and documentation.

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There are some typos in boot image header and riscv boot documentation.

Fix the typos.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Link: https://lore.kernel.org/r/20191009010637.9955-1-atish.patra@wdc.com
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
This commit is contained in:
Atish Patra
2019-10-08 18:06:37 -07:00
committed by Jonathan Corbet
parent eb43135117
commit 1d5c17e470
2 changed files with 4 additions and 4 deletions
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4
arch/riscv/include/asm/image.h
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@@ -42,7 +42,7 @@
* @res2: reserved
* @magic: Magic number (RISC-V specific; deprecated)
* @magic2: Magic number 2 (to match the ARM64 'magic' field pos)
* @res4: reserved (will be used for PE COFF offset)
* @res3: reserved (will be used for PE COFF offset)
*
* The intention is for this header format to be shared between multiple
* architectures to avoid a proliferation of image header formats.
@@ -59,7 +59,7 @@ struct riscv_image_header {
u64 res2;
u64 magic;
u32 magic2;
u32 res4;
u32 res3;
};
#endif /* __ASSEMBLY__ */
#endif /* _ASM_RISCV_IMAGE_H */