phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock
Add PHY configuration registers for single link DP with 100MHz reference clock and NO_SSC. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/20210728145454.15945-7-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Swapnil Jakhade
Vinod Koul
parent
da055e5503
commit
1cc455150b
@ -103,6 +103,7 @@
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#define CMN_PLL0_FRACDIVH_M0 0x0092U
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#define CMN_PLL0_FRACDIVH_M0 0x0092U
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#define CMN_PLL0_HIGH_THR_M0 0x0093U
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#define CMN_PLL0_HIGH_THR_M0 0x0093U
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#define CMN_PLL0_DSM_DIAG_M0 0x0094U
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#define CMN_PLL0_DSM_DIAG_M0 0x0094U
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#define CMN_PLL0_DSM_FBH_OVRD_M0 0x0095U
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#define CMN_PLL0_SS_CTRL1_M0 0x0098U
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#define CMN_PLL0_SS_CTRL1_M0 0x0098U
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#define CMN_PLL0_SS_CTRL2_M0 0x0099U
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#define CMN_PLL0_SS_CTRL2_M0 0x0099U
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#define CMN_PLL0_SS_CTRL3_M0 0x009AU
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#define CMN_PLL0_SS_CTRL3_M0 0x009AU
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@ -816,6 +817,89 @@ void cdns_torrent_dp_pma_cmn_vco_cfg_25mhz(struct cdns_torrent_phy *cdns_phy,
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cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_PLLCNT_START, 0x00C7);
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cdns_torrent_phy_write(regmap, CMN_PLL1_LOCK_PLLCNT_START, 0x00C7);
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}
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}
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static
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void cdns_torrent_dp_pma_cmn_vco_cfg_100mhz(struct cdns_torrent_phy *cdns_phy,
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u32 rate, bool ssc)
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{
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struct regmap *regmap = cdns_phy->regmap_common_cdb;
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/* Assumes 100 MHz refclock */
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switch (rate) {
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/* Setting VCO for 10.8GHz */
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case 2700:
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case 5400:
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0028);
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cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_FBH_OVRD_M0, 0x0022);
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cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_FBH_OVRD_M0, 0x0022);
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cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_FBL_OVRD_M0, 0x000C);
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break;
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/* Setting VCO for 9.72GHz */
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case 1620:
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case 2430:
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case 3240:
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cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_DIAG_M0, 0x0004);
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cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_DIAG_M0, 0x0004);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_PADJ_M0, 0x0509);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0509);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_IADJ_M0, 0x0F00);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_IADJ_M0, 0x0F00);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_FILT_PADJ_M0, 0x0F08);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_FILT_PADJ_M0, 0x0F08);
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cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0061);
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cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0061);
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cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x3333);
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cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x3333);
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cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x0042);
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cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x0042);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002);
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break;
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/* Setting VCO for 8.64GHz */
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case 2160:
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case 4320:
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cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_DIAG_M0, 0x0004);
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cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_DIAG_M0, 0x0004);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_PADJ_M0, 0x0509);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0509);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_IADJ_M0, 0x0F00);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_IADJ_M0, 0x0F00);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_FILT_PADJ_M0, 0x0F08);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_FILT_PADJ_M0, 0x0F08);
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cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0056);
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cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0056);
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cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVL_M0, 0x6666);
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cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVL_M0, 0x6666);
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cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x003A);
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cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x003A);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002);
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break;
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/* Setting VCO for 8.1GHz */
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case 8100:
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cdns_torrent_phy_write(regmap, CMN_PLL0_DSM_DIAG_M0, 0x0004);
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cdns_torrent_phy_write(regmap, CMN_PLL1_DSM_DIAG_M0, 0x0004);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_PADJ_M0, 0x0509);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_PADJ_M0, 0x0509);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CP_IADJ_M0, 0x0F00);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CP_IADJ_M0, 0x0F00);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_FILT_PADJ_M0, 0x0F08);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_FILT_PADJ_M0, 0x0F08);
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cdns_torrent_phy_write(regmap, CMN_PLL0_INTDIV_M0, 0x0051);
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cdns_torrent_phy_write(regmap, CMN_PLL1_INTDIV_M0, 0x0051);
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cdns_torrent_phy_write(regmap, CMN_PLL0_FRACDIVH_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PLL1_FRACDIVH_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PLL0_HIGH_THR_M0, 0x0036);
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cdns_torrent_phy_write(regmap, CMN_PLL1_HIGH_THR_M0, 0x0036);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL0_CTRL_M0, 0x0002);
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cdns_torrent_phy_write(regmap, CMN_PDIAG_PLL1_CTRL_M0, 0x0002);
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break;
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}
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}
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/*
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/*
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* Enable or disable PLL for selected lanes.
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* Enable or disable PLL for selected lanes.
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*/
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*/
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@ -1056,6 +1140,10 @@ static int cdns_torrent_dp_configure_rate(struct cdns_torrent_phy *cdns_phy,
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else if (cdns_phy->ref_clk_rate == CLK_25_MHZ)
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else if (cdns_phy->ref_clk_rate == CLK_25_MHZ)
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/* PMA common configuration 25MHz */
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/* PMA common configuration 25MHz */
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cdns_torrent_dp_pma_cmn_vco_cfg_25mhz(cdns_phy, dp->link_rate, dp->ssc);
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cdns_torrent_dp_pma_cmn_vco_cfg_25mhz(cdns_phy, dp->link_rate, dp->ssc);
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else if (cdns_phy->ref_clk_rate == CLK_100_MHZ)
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/* PMA common configuration 100MHz */
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cdns_torrent_dp_pma_cmn_vco_cfg_100mhz(cdns_phy, dp->link_rate, dp->ssc);
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cdns_torrent_dp_pma_cmn_rate(cdns_phy, dp->link_rate, dp->lanes);
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cdns_torrent_dp_pma_cmn_rate(cdns_phy, dp->link_rate, dp->lanes);
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/* Enable the cmn_pll0_en. */
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/* Enable the cmn_pll0_en. */
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@ -1395,6 +1483,7 @@ static int cdns_torrent_dp_init(struct phy *phy)
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switch (cdns_phy->ref_clk_rate) {
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switch (cdns_phy->ref_clk_rate) {
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case CLK_19_2_MHZ:
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case CLK_19_2_MHZ:
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case CLK_25_MHZ:
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case CLK_25_MHZ:
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case CLK_100_MHZ:
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/* Valid Ref Clock Rate */
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/* Valid Ref Clock Rate */
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break;
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break;
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default:
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default:
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@ -1431,6 +1520,11 @@ static int cdns_torrent_dp_init(struct phy *phy)
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cdns_torrent_dp_pma_cmn_vco_cfg_25mhz(cdns_phy,
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cdns_torrent_dp_pma_cmn_vco_cfg_25mhz(cdns_phy,
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cdns_phy->max_bit_rate,
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cdns_phy->max_bit_rate,
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false);
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false);
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else if (cdns_phy->ref_clk_rate == CLK_100_MHZ)
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cdns_torrent_dp_pma_cmn_vco_cfg_100mhz(cdns_phy,
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cdns_phy->max_bit_rate,
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false);
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cdns_torrent_dp_pma_cmn_rate(cdns_phy, cdns_phy->max_bit_rate,
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cdns_torrent_dp_pma_cmn_rate(cdns_phy, cdns_phy->max_bit_rate,
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inst->num_lanes);
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inst->num_lanes);
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@ -2511,6 +2605,44 @@ static struct cdns_torrent_vals sl_dp_25_no_ssc_rx_ln_vals = {
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.num_regs = ARRAY_SIZE(sl_dp_25_no_ssc_rx_ln_regs),
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.num_regs = ARRAY_SIZE(sl_dp_25_no_ssc_rx_ln_regs),
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};
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};
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/* Single DP, 100 MHz Ref clk, no SSC */
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static struct cdns_reg_pairs sl_dp_100_no_ssc_cmn_regs[] = {
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{0x0003, CMN_PLL0_VCOCAL_TCTRL},
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{0x0003, CMN_PLL1_VCOCAL_TCTRL}
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};
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static struct cdns_reg_pairs sl_dp_100_no_ssc_tx_ln_regs[] = {
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{0x00FB, TX_PSC_A0},
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{0x04AA, TX_PSC_A2},
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{0x04AA, TX_PSC_A3},
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{0x000F, XCVR_DIAG_BIDI_CTRL}
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};
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static struct cdns_reg_pairs sl_dp_100_no_ssc_rx_ln_regs[] = {
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{0x0000, RX_PSC_A0},
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{0x0000, RX_PSC_A2},
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{0x0000, RX_PSC_A3},
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{0x0000, RX_PSC_CAL},
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{0x0000, RX_REE_GCSM1_CTRL},
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{0x0000, RX_REE_GCSM2_CTRL},
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{0x0000, RX_REE_PERGCSM_CTRL}
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};
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static struct cdns_torrent_vals sl_dp_100_no_ssc_cmn_vals = {
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.reg_pairs = sl_dp_100_no_ssc_cmn_regs,
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.num_regs = ARRAY_SIZE(sl_dp_100_no_ssc_cmn_regs),
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};
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static struct cdns_torrent_vals sl_dp_100_no_ssc_tx_ln_vals = {
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.reg_pairs = sl_dp_100_no_ssc_tx_ln_regs,
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.num_regs = ARRAY_SIZE(sl_dp_100_no_ssc_tx_ln_regs),
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};
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static struct cdns_torrent_vals sl_dp_100_no_ssc_rx_ln_vals = {
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.reg_pairs = sl_dp_100_no_ssc_rx_ln_regs,
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.num_regs = ARRAY_SIZE(sl_dp_100_no_ssc_rx_ln_regs),
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};
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/* USB and SGMII/QSGMII link configuration */
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/* USB and SGMII/QSGMII link configuration */
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static struct cdns_reg_pairs usb_sgmii_link_cmn_regs[] = {
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static struct cdns_reg_pairs usb_sgmii_link_cmn_regs[] = {
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{0x0002, PHY_PLL_CFG},
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{0x0002, PHY_PLL_CFG},
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@ -3450,6 +3582,11 @@ static const struct cdns_torrent_data cdns_map_torrent = {
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},
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},
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},
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},
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[CLK_100_MHZ] = {
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[CLK_100_MHZ] = {
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[TYPE_DP] = {
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[TYPE_NONE] = {
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[NO_SSC] = &sl_dp_100_no_ssc_cmn_vals,
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},
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},
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[TYPE_PCIE] = {
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[TYPE_PCIE] = {
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[TYPE_NONE] = {
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[TYPE_NONE] = {
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[NO_SSC] = NULL,
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[NO_SSC] = NULL,
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@ -3542,6 +3679,11 @@ static const struct cdns_torrent_data cdns_map_torrent = {
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},
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},
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},
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},
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[CLK_100_MHZ] = {
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[CLK_100_MHZ] = {
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[TYPE_DP] = {
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[TYPE_NONE] = {
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[NO_SSC] = &sl_dp_100_no_ssc_tx_ln_vals,
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},
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},
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[TYPE_PCIE] = {
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[TYPE_PCIE] = {
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[TYPE_NONE] = {
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[TYPE_NONE] = {
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[NO_SSC] = NULL,
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[NO_SSC] = NULL,
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@ -3634,6 +3776,11 @@ static const struct cdns_torrent_data cdns_map_torrent = {
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},
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},
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},
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},
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[CLK_100_MHZ] = {
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[CLK_100_MHZ] = {
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[TYPE_DP] = {
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[TYPE_NONE] = {
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[NO_SSC] = &sl_dp_100_no_ssc_rx_ln_vals,
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},
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},
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[TYPE_PCIE] = {
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[TYPE_PCIE] = {
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[TYPE_NONE] = {
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[TYPE_NONE] = {
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[NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
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[NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
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@ -3917,6 +4064,11 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = {
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},
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},
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},
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},
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[CLK_100_MHZ] = {
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[CLK_100_MHZ] = {
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[TYPE_DP] = {
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[TYPE_NONE] = {
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[NO_SSC] = &sl_dp_100_no_ssc_cmn_vals,
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},
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},
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[TYPE_PCIE] = {
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[TYPE_PCIE] = {
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[TYPE_NONE] = {
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[TYPE_NONE] = {
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[NO_SSC] = NULL,
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[NO_SSC] = NULL,
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@ -4009,6 +4161,11 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = {
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},
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},
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},
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},
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[CLK_100_MHZ] = {
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[CLK_100_MHZ] = {
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[TYPE_DP] = {
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[TYPE_NONE] = {
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[NO_SSC] = &sl_dp_100_no_ssc_tx_ln_vals,
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},
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},
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[TYPE_PCIE] = {
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[TYPE_PCIE] = {
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[TYPE_NONE] = {
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[TYPE_NONE] = {
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[NO_SSC] = NULL,
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[NO_SSC] = NULL,
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@ -4101,6 +4258,11 @@ static const struct cdns_torrent_data ti_j721e_map_torrent = {
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},
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},
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},
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},
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[CLK_100_MHZ] = {
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[CLK_100_MHZ] = {
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[TYPE_DP] = {
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[TYPE_NONE] = {
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[NO_SSC] = &sl_dp_100_no_ssc_rx_ln_vals,
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},
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},
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[TYPE_PCIE] = {
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[TYPE_PCIE] = {
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[TYPE_NONE] = {
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[TYPE_NONE] = {
|
||||||
[NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
|
[NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user