iwlwifi: don't panic in error path on non-msix systems
The driver uses msix causes-register to handle both msix and non msix interrupts when performing sync nmi. On devices that do not support msix this register is unmapped and accessing it causes a kernel panic. Solve this by differentiating the two cases and accessing the proper causes-register in each case. Reported-by: Michal Hocko <mhocko@kernel.org> Signed-off-by: Shahar S Matityahu <shahar.s.matityahu@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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1c6bca6d75
@ -3644,20 +3644,27 @@ out_no_pci:
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void iwl_trans_pcie_sync_nmi(struct iwl_trans *trans)
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{
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struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
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unsigned long timeout = jiffies + IWL_TRANS_NMI_TIMEOUT;
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u32 inta_addr, sw_err_bit;
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if (trans_pcie->msix_enabled) {
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inta_addr = CSR_MSIX_HW_INT_CAUSES_AD;
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sw_err_bit = MSIX_HW_INT_CAUSES_REG_SW_ERR;
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} else {
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inta_addr = CSR_INT;
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sw_err_bit = CSR_INT_BIT_SW_ERR;
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}
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iwl_disable_interrupts(trans);
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iwl_force_nmi(trans);
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while (time_after(timeout, jiffies)) {
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u32 inta_hw = iwl_read32(trans,
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CSR_MSIX_HW_INT_CAUSES_AD);
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u32 inta_hw = iwl_read32(trans, inta_addr);
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/* Error detected by uCode */
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if (inta_hw & MSIX_HW_INT_CAUSES_REG_SW_ERR) {
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if (inta_hw & sw_err_bit) {
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/* Clear causes register */
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iwl_write32(trans, CSR_MSIX_HW_INT_CAUSES_AD,
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inta_hw &
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MSIX_HW_INT_CAUSES_REG_SW_ERR);
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iwl_write32(trans, inta_addr, inta_hw & sw_err_bit);
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break;
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}
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