ARM: OMAP2+: Drop legacy platform data for omap4 gpu
I've tested that the interconnect target module enables and idles just fine when probed with ti-sysc with PM runtime control via sys: # echo on > $(find /sys -name control | grep \/5601) # rwmem 0x56000024 0x56000024 = 0x00010200 # SGX540 CORE_REVISION # echo auto > $(find /sys -name control | grep \/5601) # rwmem 0x56000024 And when idled, it will produce "Bus error" as expected. Cc: Adam Ford <aford173@gmail.com> Cc: Filip Matijević <filip.matijevic.pz@gmail.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: moaz korena <moaz@korena.xyz> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Cc: Philipp Rossak <embed3d@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -330,7 +330,6 @@
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target-module@56000000 {
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compatible = "ti,sysc-omap4", "ti,sysc";
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ti,hwmods = "gpu";
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reg = <0x5601fc00 0x4>,
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<0x5601fc10 0x4>;
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reg-names = "rev", "sysc";
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@ -1085,41 +1085,6 @@ static struct omap_hwmod omap44xx_gpmc_hwmod = {
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},
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};
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/*
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* 'gpu' class
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* 2d/3d graphics accelerator
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*/
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static struct omap_hwmod_class_sysconfig omap44xx_gpu_sysc = {
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.rev_offs = 0x1fc00,
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.sysc_offs = 0x1fc10,
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.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
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MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class omap44xx_gpu_hwmod_class = {
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.name = "gpu",
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.sysc = &omap44xx_gpu_sysc,
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};
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/* gpu */
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static struct omap_hwmod omap44xx_gpu_hwmod = {
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.name = "gpu",
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.class = &omap44xx_gpu_hwmod_class,
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.clkdm_name = "l3_gfx_clkdm",
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.main_clk = "sgx_clk_mux",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP4_CM_GFX_GFX_CLKCTRL_OFFSET,
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.context_offs = OMAP4_RM_GFX_GFX_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/*
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* 'hdq1w' class
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* hdq / 1-wire serial interface controller
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@ -2596,14 +2561,6 @@ static struct omap_hwmod_ocp_if omap44xx_fdif__l3_main_2 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* gpu -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_gpu__l3_main_2 = {
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.master = &omap44xx_gpu_hwmod,
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.slave = &omap44xx_l3_main_2_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* hsi -> l3_main_2 */
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static struct omap_hwmod_ocp_if omap44xx_hsi__l3_main_2 = {
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.master = &omap44xx_hsi_hwmod,
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@ -3028,14 +2985,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpmc = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l3_main_2 -> gpu */
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static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpu = {
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.master = &omap44xx_l3_main_2_hwmod,
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.slave = &omap44xx_gpu_hwmod,
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.clk = "l3_div_ck",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> hdq1w */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__hdq1w = {
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.master = &omap44xx_l4_per_hwmod,
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@ -3450,7 +3399,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_debugss__l3_main_2,
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&omap44xx_dma_system__l3_main_2,
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&omap44xx_fdif__l3_main_2,
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&omap44xx_gpu__l3_main_2,
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&omap44xx_hsi__l3_main_2,
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&omap44xx_ipu__l3_main_2,
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&omap44xx_iss__l3_main_2,
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@ -3503,7 +3451,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
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&omap44xx_l4_per__elm,
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&omap44xx_l4_cfg__fdif,
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&omap44xx_l3_main_2__gpmc,
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&omap44xx_l3_main_2__gpu,
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&omap44xx_l4_per__hdq1w,
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&omap44xx_l4_cfg__hsi,
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&omap44xx_l3_main_2__ipu,
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