Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer updates from Thomas Gleixner:
 "A rather large update for timers/timekeeping:

   - compat syscall consolidation (Al Viro)

   - Posix timer consolidation (Christoph Helwig / Thomas Gleixner)

   - Cleanup of the device tree based initialization for clockevents and
     clocksources (Daniel Lezcano)

   - Consolidation of the FTTMR010 clocksource/event driver (Linus
     Walleij)

   - The usual set of small fixes and updates all over the place"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (93 commits)
  timers: Make the cpu base lock raw
  clocksource/drivers/mips-gic-timer: Fix an error code in 'gic_clocksource_of_init()'
  clocksource/drivers/fsl_ftm_timer: Unmap region obtained by of_iomap
  clocksource/drivers/tcb_clksrc: Make IO endian agnostic
  clocksource/drivers/sun4i: Switch to the timer-of common init
  clocksource/drivers/timer-of: Fix invalid iomap check
  Revert "ktime: Simplify ktime_compare implementation"
  clocksource/drivers: Fix uninitialized variable use in timer_of_init
  kselftests: timers: Add test for frequency step
  kselftests: timers: Fix inconsistency-check to not ignore first timestamp
  time: Add warning about imminent deprecation of CONFIG_GENERIC_TIME_VSYSCALL_OLD
  time: Clean up CLOCK_MONOTONIC_RAW time handling
  posix-cpu-timers: Make timespec to nsec conversion safe
  itimer: Make timeval to nsec conversion range limited
  timers: Fix parameter description of try_to_del_timer_sync()
  ktime: Simplify ktime_compare implementation
  clocksource/drivers/fttmr010: Factor out clock read code
  clocksource/drivers/fttmr010: Implement delay timer
  clocksource/drivers: Add timer-of common init routine
  clocksource/drivers/tcb_clksrc: Save timer context on suspend/resume
  ...
This commit is contained in:
Linus Torvalds 2017-07-03 16:14:51 -07:00
commit 1b044f1cfc
175 changed files with 2523 additions and 3191 deletions

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@ -7,7 +7,11 @@ Required properties:
- compatible : Must be one of - compatible : Must be one of
"faraday,fttmr010" "faraday,fttmr010"
"cortina,gemini-timer" "cortina,gemini-timer", "faraday,fttmr010"
"moxa,moxart-timer", "faraday,fttmr010"
"aspeed,ast2400-timer"
"aspeed,ast2500-timer"
- reg : Should contain registers location and length - reg : Should contain registers location and length
- interrupts : Should contain the three timer interrupts usually with - interrupts : Should contain the three timer interrupts usually with
flags for falling edge flags for falling edge

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@ -1,19 +0,0 @@
MOXA ART timer
Required properties:
- compatible : Must be one of:
- "moxa,moxart-timer"
- "aspeed,ast2400-timer"
- reg : Should contain registers location and length
- interrupts : Should contain the timer interrupt number
- clocks : Should contain phandle for the clock that drives the counter
Example:
timer: timer@98400000 {
compatible = "moxa,moxart-timer";
reg = <0x98400000 0x42>;
interrupts = <19 1>;
clocks = <&coreclk>;
};

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@ -36,7 +36,6 @@ generic-y += preempt.h
generic-y += resource.h generic-y += resource.h
generic-y += sembuf.h generic-y += sembuf.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += siginfo.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h
generic-y += stat.h generic-y += stat.h

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -470,7 +470,7 @@ void __init setup_arch(char **cmdline_p)
void __init time_init(void) void __init time_init(void)
{ {
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
} }
static int __init customize_machine(void) static int __init customize_machine(void)

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@ -337,7 +337,7 @@ config ARCH_MULTIPLATFORM
select ARM_HAS_SG_CHAIN select ARM_HAS_SG_CHAIN
select ARM_PATCH_PHYS_VIRT select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR select AUTO_ZRELADDR
select CLKSRC_OF select TIMER_OF
select COMMON_CLK select COMMON_CLK
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_PCI select MIGHT_HAVE_PCI
@ -351,7 +351,7 @@ config ARM_SINGLE_ARMV7M
depends on !MMU depends on !MMU
select ARM_NVIC select ARM_NVIC
select AUTO_ZRELADDR select AUTO_ZRELADDR
select CLKSRC_OF select TIMER_OF
select COMMON_CLK select COMMON_CLK
select CPU_V7M select CPU_V7M
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
@ -532,7 +532,7 @@ config ARCH_PXA
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_PXA select CLKSRC_PXA
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF select TIMER_OF
select CPU_XSCALE if !CPU_XSC3 select CPU_XSCALE if !CPU_XSC3
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GPIO_PXA select GPIO_PXA
@ -571,7 +571,7 @@ config ARCH_SA1100
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_PXA select CLKSRC_PXA
select CLKSRC_OF if OF select TIMER_OF if OF
select CPU_FREQ select CPU_FREQ
select CPU_SA1100 select CPU_SA1100
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
@ -1357,7 +1357,7 @@ config HAVE_ARM_ARCH_TIMER
config HAVE_ARM_TWD config HAVE_ARM_TWD
bool bool
select CLKSRC_OF if OF select TIMER_OF if OF
help help
This options enables support for the ARM timer and watchdog unit This options enables support for the ARM timer and watchdog unit

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@ -893,6 +893,7 @@
//interrupts = <16 17 18 35 36 37 38 39>; //interrupts = <16 17 18 35 36 37 38 39>;
interrupts = <16>; interrupts = <16>;
clocks = <&clk_apb>; clocks = <&clk_apb>;
clock-names = "PCLK";
}; };
wdt1: wdt@1e785000 { wdt1: wdt@1e785000 {

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@ -1000,6 +1000,7 @@
//interrupts = <16 17 18 35 36 37 38 39>; //interrupts = <16 17 18 35 36 37 38 39>;
interrupts = <16>; interrupts = <16>;
clocks = <&clk_apb>; clocks = <&clk_apb>;
clock-names = "PCLK";
}; };

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@ -28,7 +28,6 @@ generic-y += segment.h
generic-y += sembuf.h generic-y += sembuf.h
generic-y += serial.h generic-y += serial.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += siginfo.h
generic-y += simd.h generic-y += simd.h
generic-y += sizes.h generic-y += sizes.h
generic-y += socket.h generic-y += socket.h

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@ -4,3 +4,5 @@ include include/uapi/asm-generic/Kbuild.asm
genhdr-y += unistd-common.h genhdr-y += unistd-common.h
genhdr-y += unistd-oabi.h genhdr-y += unistd-oabi.h
genhdr-y += unistd-eabi.h genhdr-y += unistd-eabi.h
generic-y += siginfo.h

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@ -403,7 +403,7 @@ out:
WARN(err, "twd_local_timer_of_register failed (%d)\n", err); WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
return err; return err;
} }
CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register); TIMER_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register); TIMER_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register); TIMER_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
#endif #endif

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@ -120,6 +120,6 @@ void __init time_init(void)
#ifdef CONFIG_COMMON_CLK #ifdef CONFIG_COMMON_CLK
of_clk_init(NULL); of_clk_init(NULL);
#endif #endif
clocksource_probe(); timer_probe();
} }
} }

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@ -4,7 +4,7 @@ menuconfig ARCH_ASPEED
select SRAM select SRAM
select WATCHDOG select WATCHDOG
select ASPEED_WATCHDOG select ASPEED_WATCHDOG
select MOXART_TIMER select FTTMR010_TIMER
select MFD_SYSCON select MFD_SYSCON
select PINCTRL select PINCTRL
help help

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@ -150,7 +150,7 @@ config ARCH_BCM2835
select ARM_ERRATA_411920 if ARCH_MULTI_V6 select ARM_ERRATA_411920 if ARCH_MULTI_V6
select ARM_TIMER_SP804 select ARM_TIMER_SP804
select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
select CLKSRC_OF select TIMER_OF
select BCM2835_TIMER select BCM2835_TIMER
select PINCTRL select PINCTRL
select PINCTRL_BCM2835 select PINCTRL_BCM2835

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@ -2,7 +2,7 @@ menuconfig ARCH_CLPS711X
bool "Cirrus Logic EP721x/EP731x-based" bool "Cirrus Logic EP721x/EP731x-based"
depends on ARCH_MULTI_V4T depends on ARCH_MULTI_V4T
select AUTO_ZRELADDR select AUTO_ZRELADDR
select CLKSRC_OF select TIMER_OF
select CLPS711X_TIMER select CLPS711X_TIMER
select COMMON_CLK select COMMON_CLK
select CPU_ARM720T select CPU_ARM720T

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@ -41,7 +41,7 @@ static void __init mediatek_timer_init(void)
} }
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
}; };
static const char * const mediatek_board_dt_compat[] = { static const char * const mediatek_board_dt_compat[] = {

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@ -4,7 +4,7 @@ menuconfig ARCH_MOXART
select CPU_FA526 select CPU_FA526
select ARM_DMA_MEM_BUFFERABLE select ARM_DMA_MEM_BUFFERABLE
select FARADAY_FTINTC010 select FARADAY_FTINTC010
select MOXART_TIMER select FTTMR010_TIMER
select GPIOLIB select GPIOLIB
select PHYLIB if NETDEVICES select PHYLIB if NETDEVICES
help help

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@ -497,7 +497,7 @@ void __init omap_init_time(void)
__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon", __omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
2, "timer_sys_ck", NULL, false); 2, "timer_sys_ck", NULL, false);
clocksource_probe(); timer_probe();
} }
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX) #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
@ -506,7 +506,7 @@ void __init omap3_secure_sync32k_timer_init(void)
__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure", __omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
2, "timer_sys_ck", NULL, false); 2, "timer_sys_ck", NULL, false);
clocksource_probe(); timer_probe();
} }
#endif /* CONFIG_ARCH_OMAP3 */ #endif /* CONFIG_ARCH_OMAP3 */
@ -517,7 +517,7 @@ void __init omap3_gptimer_timer_init(void)
__omap_sync32k_timer_init(2, "timer_sys_ck", NULL, __omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
1, "timer_sys_ck", "ti,timer-alwon", true); 1, "timer_sys_ck", "ti,timer-alwon", true);
if (of_have_populated_dt()) if (of_have_populated_dt())
clocksource_probe(); timer_probe();
} }
#endif #endif
@ -532,7 +532,7 @@ static void __init omap4_sync32k_timer_init(void)
void __init omap4_local_timer_init(void) void __init omap4_local_timer_init(void)
{ {
omap4_sync32k_timer_init(); omap4_sync32k_timer_init();
clocksource_probe(); timer_probe();
} }
#endif #endif
@ -656,7 +656,7 @@ void __init omap5_realtime_timer_init(void)
omap4_sync32k_timer_init(); omap4_sync32k_timer_init();
realtime_counter_init(); realtime_counter_init();
clocksource_probe(); timer_probe();
} }
#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */ #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */

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@ -55,7 +55,7 @@ static void __init rockchip_timer_init(void)
} }
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
} }
static void __init rockchip_dt_init(void) static void __init rockchip_dt_init(void)

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@ -394,7 +394,7 @@ config MACH_SMDK2416
config MACH_S3C2416_DT config MACH_S3C2416_DT
bool "Samsung S3C2416 machine using devicetree" bool "Samsung S3C2416 machine using devicetree"
select CLKSRC_OF select TIMER_OF
select USE_OF select USE_OF
select PINCTRL select PINCTRL
select PINCTRL_S3C24XX select PINCTRL_S3C24XX

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@ -336,7 +336,7 @@ config MACH_WLF_CRAGG_6410
config MACH_S3C64XX_DT config MACH_S3C64XX_DT
bool "Samsung S3C6400/S3C6410 machine using Device Tree" bool "Samsung S3C6400/S3C6410 machine using Device Tree"
select CLKSRC_OF select TIMER_OF
select CPU_S3C6400 select CPU_S3C6400
select CPU_S3C6410 select CPU_S3C6410
select PINCTRL select PINCTRL

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@ -113,7 +113,7 @@ void __init rcar_gen2_timer_init(void)
#endif /* CONFIG_ARM_ARCH_TIMER */ #endif /* CONFIG_ARM_ARCH_TIMER */
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
} }
struct memory_reserve_config { struct memory_reserve_config {

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@ -124,5 +124,5 @@ void __init spear13xx_timer_init(void)
clk_put(pclk); clk_put(pclk);
spear_setup_of_timer(); spear_setup_of_timer();
clocksource_probe(); timer_probe();
} }

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@ -42,7 +42,7 @@ static void __init sun6i_timer_init(void)
of_clk_init(NULL); of_clk_init(NULL);
if (IS_ENABLED(CONFIG_RESET_CONTROLLER)) if (IS_ENABLED(CONFIG_RESET_CONTROLLER))
sun6i_reset_init(); sun6i_reset_init();
clocksource_probe(); timer_probe();
} }
DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family") DT_MACHINE_START(SUN6I_DT, "Allwinner sun6i (A31) Family")

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@ -407,7 +407,7 @@ static const char * u300_board_compat[] = {
DT_MACHINE_START(U300_DT, "U300 S335/B335 (Device Tree)") DT_MACHINE_START(U300_DT, "U300 S335/B335 (Device Tree)")
.map_io = u300_map_io, .map_io = u300_map_io,
.init_irq = u300_init_irq_dt, .init_irq = u300_init_irq_dt,
.init_time = clocksource_probe, .init_time = timer_probe,
.init_machine = u300_init_machine_dt, .init_machine = u300_init_machine_dt,
.restart = u300_restart, .restart = u300_restart,
.dt_compat = u300_board_compat, .dt_compat = u300_board_compat,

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@ -150,7 +150,7 @@ static void __init zynq_timer_init(void)
{ {
zynq_clock_init(); zynq_clock_init();
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
} }
static struct map_desc zynq_cortex_a9_scu_map __initdata = { static struct map_desc zynq_cortex_a9_scu_map __initdata = {

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@ -18,7 +18,7 @@ config ARCH_ALPINE
config ARCH_BCM2835 config ARCH_BCM2835
bool "Broadcom BCM2835 family" bool "Broadcom BCM2835 family"
select CLKSRC_OF select TIMER_OF
select GPIOLIB select GPIOLIB
select PINCTRL select PINCTRL
select PINCTRL_BCM2835 select PINCTRL_BCM2835
@ -178,7 +178,7 @@ config ARCH_TEGRA
select ARCH_HAS_RESET_CONTROLLER select ARCH_HAS_RESET_CONTROLLER
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF select TIMER_OF
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GPIOLIB select GPIOLIB
select PINCTRL select PINCTRL

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@ -70,7 +70,7 @@ void __init time_init(void)
u32 arch_timer_rate; u32 arch_timer_rate;
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
tick_setup_hrtimer_broadcast(); tick_setup_hrtimer_broadcast();

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@ -220,10 +220,8 @@ void update_vsyscall(struct timekeeper *tk)
if (!use_syscall) { if (!use_syscall) {
/* tkr_mono.cycle_last == tkr_raw.cycle_last */ /* tkr_mono.cycle_last == tkr_raw.cycle_last */
vdso_data->cs_cycle_last = tk->tkr_mono.cycle_last; vdso_data->cs_cycle_last = tk->tkr_mono.cycle_last;
vdso_data->raw_time_sec = tk->raw_time.tv_sec; vdso_data->raw_time_sec = tk->raw_sec;
vdso_data->raw_time_nsec = (tk->raw_time.tv_nsec << vdso_data->raw_time_nsec = tk->tkr_raw.xtime_nsec;
tk->tkr_raw.shift) +
tk->tkr_raw.xtime_nsec;
vdso_data->xtime_clock_sec = tk->xtime_sec; vdso_data->xtime_clock_sec = tk->xtime_sec;
vdso_data->xtime_clock_nsec = tk->tkr_mono.xtime_nsec; vdso_data->xtime_clock_nsec = tk->tkr_mono.xtime_nsec;
vdso_data->cs_mono_mult = tk->tkr_mono.mult; vdso_data->cs_mono_mult = tk->tkr_mono.mult;

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@ -45,7 +45,6 @@ generic-y += sembuf.h
generic-y += serial.h generic-y += serial.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += shmparam.h generic-y += shmparam.h
generic-y += siginfo.h
generic-y += signal.h generic-y += signal.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h

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@ -2,3 +2,4 @@
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += kvm_para.h generic-y += kvm_para.h
generic-y += siginfo.h

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@ -36,7 +36,6 @@ generic-y += resource.h
generic-y += sections.h generic-y += sections.h
generic-y += sembuf.h generic-y += sembuf.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += siginfo.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h
generic-y += statfs.h generic-y += statfs.h

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -15,7 +15,7 @@ config H8300
select OF_IRQ select OF_IRQ
select OF_EARLY_FLATTREE select OF_EARLY_FLATTREE
select HAVE_MEMBLOCK select HAVE_MEMBLOCK
select CLKSRC_OF select TIMER_OF
select H8300_TMR8 select H8300_TMR8
select HAVE_KERNEL_GZIP select HAVE_KERNEL_GZIP
select HAVE_KERNEL_LZO select HAVE_KERNEL_LZO

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@ -54,7 +54,6 @@ generic-y += serial.h
generic-y += setup.h generic-y += setup.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += shmparam.h generic-y += shmparam.h
generic-y += siginfo.h
generic-y += sizes.h generic-y += sizes.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -246,5 +246,5 @@ void __init calibrate_delay(void)
void __init time_init(void) void __init time_init(void)
{ {
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
} }

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@ -41,7 +41,6 @@ generic-y += sembuf.h
generic-y += serial.h generic-y += serial.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += shmparam.h generic-y += shmparam.h
generic-y += siginfo.h
generic-y += sizes.h generic-y += sizes.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -1,23 +0,0 @@
/*
* Based on <asm-i386/siginfo.h>.
*
* Modified 1998-2002
* David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
*/
#ifndef _ASM_IA64_SIGINFO_H
#define _ASM_IA64_SIGINFO_H
#include <linux/string.h>
#include <uapi/asm/siginfo.h>
static inline void
copy_siginfo (siginfo_t *to, siginfo_t *from)
{
if (from->si_code < 0)
memcpy(to, from, sizeof(siginfo_t));
else
/* _sigchld is currently the largest know union member */
memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld));
}
#endif /* _ASM_IA64_SIGINFO_H */

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@ -11,7 +11,6 @@
#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) #define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
#define HAVE_ARCH_SIGINFO_T #define HAVE_ARCH_SIGINFO_T
#define HAVE_ARCH_COPY_SIGINFO
#define HAVE_ARCH_COPY_SIGINFO_TO_USER #define HAVE_ARCH_COPY_SIGINFO_TO_USER
#include <asm-generic/siginfo.h> #include <asm-generic/siginfo.h>

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -1,6 +0,0 @@
#ifndef _M32R_SIGINFO_H
#define _M32R_SIGINFO_H
#include <asm-generic/siginfo.h>
#endif /* _M32R_SIGINFO_H */

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@ -25,7 +25,6 @@ generic-y += preempt.h
generic-y += resource.h generic-y += resource.h
generic-y += sections.h generic-y += sections.h
generic-y += shmparam.h generic-y += shmparam.h
generic-y += siginfo.h
generic-y += spinlock.h generic-y += spinlock.h
generic-y += statfs.h generic-y += statfs.h
generic-y += termios.h generic-y += termios.h

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@ -5,6 +5,7 @@ generic-y += auxvec.h
generic-y += msgbuf.h generic-y += msgbuf.h
generic-y += sembuf.h generic-y += sembuf.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += siginfo.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h
generic-y += termbits.h generic-y += termbits.h

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@ -4,7 +4,7 @@ config MICROBLAZE
select ARCH_MIGHT_HAVE_PC_PARPORT select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_WANT_IPC_PARSE_VERSION select ARCH_WANT_IPC_PARSE_VERSION
select BUILDTIME_EXTABLE_SORT select BUILDTIME_EXTABLE_SORT
select CLKSRC_OF select TIMER_OF
select CLONE_BACKWARDS3 select CLONE_BACKWARDS3
select COMMON_CLK select COMMON_CLK
select GENERIC_ATOMIC64 select GENERIC_ATOMIC64

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@ -2,3 +2,4 @@
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += types.h generic-y += types.h
generic-y += siginfo.h

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@ -192,7 +192,7 @@ void __init time_init(void)
{ {
of_clk_init(NULL); of_clk_init(NULL);
setup_cpuinfo_clk(); setup_cpuinfo_clk();
clocksource_probe(); timer_probe();
} }
#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_DEBUG_FS

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@ -335,5 +335,5 @@ static int __init xilinx_timer_init(struct device_node *timer)
return 0; return 0;
} }
CLOCKSOURCE_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a", TIMER_OF_DECLARE(xilinx_timer, "xlnx,xps-timer-1.00.a",
xilinx_timer_init); xilinx_timer_init);

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@ -161,7 +161,7 @@ void __init plat_time_init(void)
} }
} }
clocksource_probe(); timer_probe();
} }
void __init arch_init_irq(void) void __init arch_init_irq(void)

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@ -265,7 +265,7 @@ void __init plat_time_init(void)
(freq%1000000)*100/1000000); (freq%1000000)*100/1000000);
#ifdef CONFIG_CLKSRC_MIPS_GIC #ifdef CONFIG_CLKSRC_MIPS_GIC
update_gic_frequency_dt(); update_gic_frequency_dt();
clocksource_probe(); timer_probe();
#endif #endif
} }
#endif #endif

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@ -64,5 +64,5 @@ void __init plat_time_init(void)
pr_info("CPU Clock: %ldMHz\n", rate / 1000000); pr_info("CPU Clock: %ldMHz\n", rate / 1000000);
mips_hpt_frequency = rate / 2; mips_hpt_frequency = rate / 2;
clocksource_probe(); timer_probe();
} }

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@ -39,7 +39,7 @@ void __init plat_time_init(void)
struct clk *clk; struct clk *clk;
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
np = of_get_cpu_node(0, NULL); np = of_get_cpu_node(0, NULL);
if (!np) { if (!np) {

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@ -4,7 +4,7 @@ config CLKEVT_RT3352
bool bool
depends on SOC_RT305X || SOC_MT7620 depends on SOC_RT305X || SOC_MT7620
default y default y
select CLKSRC_OF select TIMER_OF
select CLKSRC_MMIO select CLKSRC_MMIO
config RALINK_ILL_ACC config RALINK_ILL_ACC

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@ -152,4 +152,4 @@ static int __init ralink_systick_init(struct device_node *np)
return 0; return 0;
} }
CLOCKSOURCE_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init); TIMER_OF_DECLARE(systick, "ralink,cevt-systick", ralink_systick_init);

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@ -82,5 +82,5 @@ void __init plat_time_init(void)
pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000); pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
mips_hpt_frequency = clk_get_rate(clk) / 2; mips_hpt_frequency = clk_get_rate(clk) / 2;
clk_put(clk); clk_put(clk);
clocksource_probe(); timer_probe();
} }

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@ -20,5 +20,5 @@ void __init plat_time_init(void)
ralink_of_remap(); ralink_of_remap();
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
} }

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@ -22,7 +22,7 @@ void __init plat_time_init(void)
struct clk *clk; struct clk *clk;
of_clk_init(NULL); of_clk_init(NULL);
clocksource_probe(); timer_probe();
np = of_get_cpu_node(0, NULL); np = of_get_cpu_node(0, NULL);
if (!np) { if (!np) {

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -1 +0,0 @@
#include <asm-generic/siginfo.h>

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@ -1,6 +1,6 @@
config NIOS2 config NIOS2
def_bool y def_bool y
select CLKSRC_OF select TIMER_OF
select GENERIC_ATOMIC64 select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GENERIC_CPU_DEVICES select GENERIC_CPU_DEVICES

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@ -47,7 +47,6 @@ generic-y += segment.h
generic-y += sembuf.h generic-y += sembuf.h
generic-y += serial.h generic-y += serial.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += siginfo.h
generic-y += signal.h generic-y += signal.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h

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@ -2,4 +2,5 @@
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += setup.h generic-y += setup.h
generic-y += siginfo.h
generic-y += ucontext.h generic-y += ucontext.h

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@ -350,7 +350,7 @@ void __init time_init(void)
if (count < 2) if (count < 2)
panic("%d timer is found, it needs 2 timers in system\n", count); panic("%d timer is found, it needs 2 timers in system\n", count);
clocksource_probe(); timer_probe();
} }
CLOCKSOURCE_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init); TIMER_OF_DECLARE(nios2_timer, ALTR_TIMER_COMPATIBLE, nios2_time_init);

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@ -46,7 +46,6 @@ generic-y += sembuf.h
generic-y += setup.h generic-y += setup.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += shmparam.h generic-y += shmparam.h
generic-y += siginfo.h
generic-y += signal.h generic-y += signal.h
generic-y += socket.h generic-y += socket.h
generic-y += sockios.h generic-y += sockios.h

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -1,6 +0,0 @@
#ifndef _ASM_SCORE_SIGINFO_H
#define _ASM_SCORE_SIGINFO_H
#include <asm-generic/siginfo.h>
#endif /* _ASM_SCORE_SIGINFO_H */

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@ -10,7 +10,7 @@ config SH_DEVICE_TREE
bool "Board Described by Device Tree" bool "Board Described by Device Tree"
select OF select OF
select OF_EARLY_FLATTREE select OF_EARLY_FLATTREE
select CLKSRC_OF select TIMER_OF
select COMMON_CLK select COMMON_CLK
select GENERIC_CALIBRATE_DELAY select GENERIC_CALIBRATE_DELAY
help help

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@ -119,7 +119,7 @@ static void __init sh_of_mem_reserve(void)
static void __init sh_of_time_init(void) static void __init sh_of_time_init(void)
{ {
pr_info("SH generic board support: scanning for clocksource devices\n"); pr_info("SH generic board support: scanning for clocksource devices\n");
clocksource_probe(); timer_probe();
} }
static void __init sh_of_setup(char **cmdline_p) static void __init sh_of_setup(char **cmdline_p)

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@ -29,7 +29,6 @@ generic-y += rwsem.h
generic-y += sembuf.h generic-y += sembuf.h
generic-y += serial.h generic-y += serial.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += siginfo.h
generic-y += sizes.h generic-y += sizes.h
generic-y += socket.h generic-y += socket.h
generic-y += statfs.h generic-y += statfs.h

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@ -1,2 +1,4 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -1,13 +0,0 @@
#ifndef __SPARC_SIGINFO_H
#define __SPARC_SIGINFO_H
#include <uapi/asm/siginfo.h>
#ifdef CONFIG_COMPAT
struct compat_siginfo;
#endif /* CONFIG_COMPAT */
#endif /* !(__SPARC_SIGINFO_H) */

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@ -44,7 +44,6 @@ generic-y += serial.h
generic-y += setup.h generic-y += setup.h
generic-y += shmbuf.h generic-y += shmbuf.h
generic-y += shmparam.h generic-y += shmparam.h
generic-y += siginfo.h
generic-y += signal.h generic-y += signal.h
generic-y += sizes.h generic-y += sizes.h
generic-y += socket.h generic-y += socket.h

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@ -2,3 +2,4 @@
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += kvm_para.h generic-y += kvm_para.h
generic-y += siginfo.h

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@ -25,7 +25,6 @@ generic-y += preempt.h
generic-y += resource.h generic-y += resource.h
generic-y += rwsem.h generic-y += rwsem.h
generic-y += sections.h generic-y += sections.h
generic-y += siginfo.h
generic-y += statfs.h generic-y += statfs.h
generic-y += termios.h generic-y += termios.h
generic-y += topology.h generic-y += topology.h

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@ -1,2 +1,3 @@
# UAPI Header export list # UAPI Header export list
include include/uapi/asm-generic/Kbuild.asm include include/uapi/asm-generic/Kbuild.asm
generic-y += siginfo.h

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@ -187,7 +187,7 @@ void __init time_init(void)
local_timer_setup(0); local_timer_setup(0);
setup_irq(this_cpu_ptr(&ccount_timer)->evt.irq, &timer_irqaction); setup_irq(this_cpu_ptr(&ccount_timer)->evt.irq, &timer_irqaction);
sched_clock_register(ccount_sched_clock_read, 32, ccount_freq); sched_clock_register(ccount_sched_clock_read, 32, ccount_freq);
clocksource_probe(); timer_probe();
} }
/* /*

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@ -539,15 +539,6 @@ config HANGCHECK_TIMER
out to lunch past a certain margin. It can reboot the system out to lunch past a certain margin. It can reboot the system
or merely print a warning. or merely print a warning.
config MMTIMER
tristate "MMTIMER Memory mapped RTC for SGI Altix"
depends on IA64_GENERIC || IA64_SGI_SN2
depends on POSIX_TIMERS
default y
help
The mmtimer device allows direct userspace access to the
Altix system timer.
config UV_MMTIMER config UV_MMTIMER
tristate "UV_MMTIMER Memory mapped RTC for SGI UV" tristate "UV_MMTIMER Memory mapped RTC for SGI UV"
depends on X86_UV depends on X86_UV

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@ -10,7 +10,6 @@ obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o
obj-$(CONFIG_RAW_DRIVER) += raw.o obj-$(CONFIG_RAW_DRIVER) += raw.o
obj-$(CONFIG_SGI_SNSC) += snsc.o snsc_event.o obj-$(CONFIG_SGI_SNSC) += snsc.o snsc_event.o
obj-$(CONFIG_MSPEC) += mspec.o obj-$(CONFIG_MSPEC) += mspec.o
obj-$(CONFIG_MMTIMER) += mmtimer.o
obj-$(CONFIG_UV_MMTIMER) += uv_mmtimer.o obj-$(CONFIG_UV_MMTIMER) += uv_mmtimer.o
obj-$(CONFIG_IBM_BSR) += bsr.o obj-$(CONFIG_IBM_BSR) += bsr.o
obj-$(CONFIG_SGI_MBCS) += mbcs.o obj-$(CONFIG_SGI_MBCS) += mbcs.o

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@ -1,858 +0,0 @@
/*
* Timer device implementation for SGI SN platforms.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved.
*
* This driver exports an API that should be supportable by any HPET or IA-PC
* multimedia timer. The code below is currently specific to the SGI Altix
* SHub RTC, however.
*
* 11/01/01 - jbarnes - initial revision
* 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
* 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
* 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
* support via the posix timer interface
*/
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/ioctl.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/fs.h>
#include <linux/mmtimer.h>
#include <linux/miscdevice.h>
#include <linux/posix-timers.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/math64.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <asm/sn/addrs.h>
#include <asm/sn/intr.h>
#include <asm/sn/shub_mmr.h>
#include <asm/sn/nodepda.h>
#include <asm/sn/shubio.h>
MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>");
MODULE_DESCRIPTION("SGI Altix RTC Timer");
MODULE_LICENSE("GPL");
/* name of the device, usually in /dev */
#define MMTIMER_NAME "mmtimer"
#define MMTIMER_DESC "SGI Altix RTC Timer"
#define MMTIMER_VERSION "2.1"
#define RTC_BITS 55 /* 55 bits for this implementation */
static struct k_clock sgi_clock;
extern unsigned long sn_rtc_cycles_per_second;
#define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC))
#define rtc_time() (*RTC_COUNTER_ADDR)
static DEFINE_MUTEX(mmtimer_mutex);
static long mmtimer_ioctl(struct file *file, unsigned int cmd,
unsigned long arg);
static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma);
/*
* Period in femtoseconds (10^-15 s)
*/
static unsigned long mmtimer_femtoperiod = 0;
static const struct file_operations mmtimer_fops = {
.owner = THIS_MODULE,
.mmap = mmtimer_mmap,
.unlocked_ioctl = mmtimer_ioctl,
.llseek = noop_llseek,
};
/*
* We only have comparison registers RTC1-4 currently available per
* node. RTC0 is used by SAL.
*/
/* Check for an RTC interrupt pending */
static int mmtimer_int_pending(int comparator)
{
if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
return 1;
else
return 0;
}
/* Clear the RTC interrupt pending bit */
static void mmtimer_clr_int_pending(int comparator)
{
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
}
/* Setup timer on comparator RTC1 */
static void mmtimer_setup_int_0(int cpu, u64 expires)
{
u64 val;
/* Disable interrupt */
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);
/* Initialize comparator value */
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);
/* Clear pending bit */
mmtimer_clr_int_pending(0);
val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |
((u64)cpu_physical_id(cpu) <<
SH_RTC1_INT_CONFIG_PID_SHFT);
/* Set configuration */
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);
/* Enable RTC interrupts */
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);
/* Initialize comparator value */
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);
}
/* Setup timer on comparator RTC2 */
static void mmtimer_setup_int_1(int cpu, u64 expires)
{
u64 val;
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);
mmtimer_clr_int_pending(1);
val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |
((u64)cpu_physical_id(cpu) <<
SH_RTC2_INT_CONFIG_PID_SHFT);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
}
/* Setup timer on comparator RTC3 */
static void mmtimer_setup_int_2(int cpu, u64 expires)
{
u64 val;
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);
mmtimer_clr_int_pending(2);
val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |
((u64)cpu_physical_id(cpu) <<
SH_RTC3_INT_CONFIG_PID_SHFT);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);
HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
}
/*
* This function must be called with interrupts disabled and preemption off
* in order to insure that the setup succeeds in a deterministic time frame.
* It will check if the interrupt setup succeeded.
*/
static int mmtimer_setup(int cpu, int comparator, unsigned long expires,
u64 *set_completion_time)
{
switch (comparator) {
case 0:
mmtimer_setup_int_0(cpu, expires);
break;
case 1:
mmtimer_setup_int_1(cpu, expires);
break;
case 2:
mmtimer_setup_int_2(cpu, expires);
break;
}
/* We might've missed our expiration time */
*set_completion_time = rtc_time();
if (*set_completion_time <= expires)
return 1;
/*
* If an interrupt is already pending then its okay
* if not then we failed
*/
return mmtimer_int_pending(comparator);
}
static int mmtimer_disable_int(long nasid, int comparator)
{
switch (comparator) {
case 0:
nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
break;
case 1:
nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
break;
case 2:
nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
break;
default:
return -EFAULT;
}
return 0;
}
#define COMPARATOR 1 /* The comparator to use */
#define TIMER_OFF 0xbadcabLL /* Timer is not setup */
#define TIMER_SET 0 /* Comparator is set for this timer */
#define MMTIMER_INTERVAL_RETRY_INCREMENT_DEFAULT 40
/* There is one of these for each timer */
struct mmtimer {
struct rb_node list;
struct k_itimer *timer;
int cpu;
};
struct mmtimer_node {
spinlock_t lock ____cacheline_aligned;
struct rb_root timer_head;
struct rb_node *next;
struct tasklet_struct tasklet;
};
static struct mmtimer_node *timers;
static unsigned mmtimer_interval_retry_increment =
MMTIMER_INTERVAL_RETRY_INCREMENT_DEFAULT;
module_param(mmtimer_interval_retry_increment, uint, 0644);
MODULE_PARM_DESC(mmtimer_interval_retry_increment,
"RTC ticks to add to expiration on interval retry (default 40)");
/*
* Add a new mmtimer struct to the node's mmtimer list.
* This function assumes the struct mmtimer_node is locked.
*/
static void mmtimer_add_list(struct mmtimer *n)
{
int nodeid = n->timer->it.mmtimer.node;
unsigned long expires = n->timer->it.mmtimer.expires;
struct rb_node **link = &timers[nodeid].timer_head.rb_node;
struct rb_node *parent = NULL;
struct mmtimer *x;
/*
* Find the right place in the rbtree:
*/
while (*link) {
parent = *link;
x = rb_entry(parent, struct mmtimer, list);
if (expires < x->timer->it.mmtimer.expires)
link = &(*link)->rb_left;
else
link = &(*link)->rb_right;
}
/*
* Insert the timer to the rbtree and check whether it
* replaces the first pending timer
*/
rb_link_node(&n->list, parent, link);
rb_insert_color(&n->list, &timers[nodeid].timer_head);
if (!timers[nodeid].next || expires < rb_entry(timers[nodeid].next,
struct mmtimer, list)->timer->it.mmtimer.expires)
timers[nodeid].next = &n->list;
}
/*
* Set the comparator for the next timer.
* This function assumes the struct mmtimer_node is locked.
*/
static void mmtimer_set_next_timer(int nodeid)
{
struct mmtimer_node *n = &timers[nodeid];
struct mmtimer *x;
struct k_itimer *t;
u64 expires, exp, set_completion_time;
int i;
restart:
if (n->next == NULL)
return;
x = rb_entry(n->next, struct mmtimer, list);
t = x->timer;
if (!t->it.mmtimer.incr) {
/* Not an interval timer */
if (!mmtimer_setup(x->cpu, COMPARATOR,
t->it.mmtimer.expires,
&set_completion_time)) {
/* Late setup, fire now */
tasklet_schedule(&n->tasklet);
}
return;
}
/* Interval timer */
i = 0;
expires = exp = t->it.mmtimer.expires;
while (!mmtimer_setup(x->cpu, COMPARATOR, expires,
&set_completion_time)) {
int to;
i++;
expires = set_completion_time +
mmtimer_interval_retry_increment + (1 << i);
/* Calculate overruns as we go. */
to = ((u64)(expires - exp) / t->it.mmtimer.incr);
if (to) {
t->it_overrun += to;
t->it.mmtimer.expires += t->it.mmtimer.incr * to;
exp = t->it.mmtimer.expires;
}
if (i > 20) {
printk(KERN_ALERT "mmtimer: cannot reschedule timer\n");
t->it.mmtimer.clock = TIMER_OFF;
n->next = rb_next(&x->list);
rb_erase(&x->list, &n->timer_head);
kfree(x);
goto restart;
}
}
}
/**
* mmtimer_ioctl - ioctl interface for /dev/mmtimer
* @file: file structure for the device
* @cmd: command to execute
* @arg: optional argument to command
*
* Executes the command specified by @cmd. Returns 0 for success, < 0 for
* failure.
*
* Valid commands:
*
* %MMTIMER_GETOFFSET - Should return the offset (relative to the start
* of the page where the registers are mapped) for the counter in question.
*
* %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
* seconds
*
* %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
* specified by @arg
*
* %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
*
* %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
*
* %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
* in the address specified by @arg.
*/
static long mmtimer_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
int ret = 0;
mutex_lock(&mmtimer_mutex);
switch (cmd) {
case MMTIMER_GETOFFSET: /* offset of the counter */
/*
* SN RTC registers are on their own 64k page
*/
if(PAGE_SIZE <= (1 << 16))
ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
else
ret = -ENOSYS;
break;
case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
if(copy_to_user((unsigned long __user *)arg,
&mmtimer_femtoperiod, sizeof(unsigned long)))
ret = -EFAULT;
break;
case MMTIMER_GETFREQ: /* frequency in Hz */
if(copy_to_user((unsigned long __user *)arg,
&sn_rtc_cycles_per_second,
sizeof(unsigned long)))
ret = -EFAULT;
break;
case MMTIMER_GETBITS: /* number of bits in the clock */
ret = RTC_BITS;
break;
case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
break;
case MMTIMER_GETCOUNTER:
if(copy_to_user((unsigned long __user *)arg,
RTC_COUNTER_ADDR, sizeof(unsigned long)))
ret = -EFAULT;
break;
default:
ret = -ENOTTY;
break;
}
mutex_unlock(&mmtimer_mutex);
return ret;
}
/**
* mmtimer_mmap - maps the clock's registers into userspace
* @file: file structure for the device
* @vma: VMA to map the registers into
*
* Calls remap_pfn_range() to map the clock's registers into
* the calling process' address space.
*/
static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
{
unsigned long mmtimer_addr;
if (vma->vm_end - vma->vm_start != PAGE_SIZE)
return -EINVAL;
if (vma->vm_flags & VM_WRITE)
return -EPERM;
if (PAGE_SIZE > (1 << 16))
return -ENOSYS;
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
mmtimer_addr = __pa(RTC_COUNTER_ADDR);
mmtimer_addr &= ~(PAGE_SIZE - 1);
mmtimer_addr &= 0xfffffffffffffffUL;
if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
PAGE_SIZE, vma->vm_page_prot)) {
printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
return -EAGAIN;
}
return 0;
}
static struct miscdevice mmtimer_miscdev = {
.minor = SGI_MMTIMER,
.name = MMTIMER_NAME,
.fops = &mmtimer_fops
};
static struct timespec sgi_clock_offset;
static int sgi_clock_period;
/*
* Posix Timer Interface
*/
static struct timespec sgi_clock_offset;
static int sgi_clock_period;
static int sgi_clock_get(clockid_t clockid, struct timespec64 *tp)
{
u64 nsec;
nsec = rtc_time() * sgi_clock_period
+ sgi_clock_offset.tv_nsec;
*tp = ns_to_timespec64(nsec);
tp->tv_sec += sgi_clock_offset.tv_sec;
return 0;
};
static int sgi_clock_set(const clockid_t clockid, const struct timespec64 *tp)
{
u64 nsec;
u32 rem;
nsec = rtc_time() * sgi_clock_period;
sgi_clock_offset.tv_sec = tp->tv_sec - div_u64_rem(nsec, NSEC_PER_SEC, &rem);
if (rem <= tp->tv_nsec)
sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
else {
sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
sgi_clock_offset.tv_sec--;
}
return 0;
}
/**
* mmtimer_interrupt - timer interrupt handler
* @irq: irq received
* @dev_id: device the irq came from
*
* Called when one of the comarators matches the counter, This
* routine will send signals to processes that have requested
* them.
*
* This interrupt is run in an interrupt context
* by the SHUB. It is therefore safe to locally access SHub
* registers.
*/
static irqreturn_t
mmtimer_interrupt(int irq, void *dev_id)
{
unsigned long expires = 0;
int result = IRQ_NONE;
unsigned indx = cpu_to_node(smp_processor_id());
struct mmtimer *base;
spin_lock(&timers[indx].lock);
base = rb_entry(timers[indx].next, struct mmtimer, list);
if (base == NULL) {
spin_unlock(&timers[indx].lock);
return result;
}
if (base->cpu == smp_processor_id()) {
if (base->timer)
expires = base->timer->it.mmtimer.expires;
/* expires test won't work with shared irqs */
if ((mmtimer_int_pending(COMPARATOR) > 0) ||
(expires && (expires <= rtc_time()))) {
mmtimer_clr_int_pending(COMPARATOR);
tasklet_schedule(&timers[indx].tasklet);
result = IRQ_HANDLED;
}
}
spin_unlock(&timers[indx].lock);
return result;
}
static void mmtimer_tasklet(unsigned long data)
{
int nodeid = data;
struct mmtimer_node *mn = &timers[nodeid];
struct mmtimer *x;
struct k_itimer *t;
unsigned long flags;
/* Send signal and deal with periodic signals */
spin_lock_irqsave(&mn->lock, flags);
if (!mn->next)
goto out;
x = rb_entry(mn->next, struct mmtimer, list);
t = x->timer;
if (t->it.mmtimer.clock == TIMER_OFF)
goto out;
t->it_overrun = 0;
mn->next = rb_next(&x->list);
rb_erase(&x->list, &mn->timer_head);
if (posix_timer_event(t, 0) != 0)
t->it_overrun++;
if(t->it.mmtimer.incr) {
t->it.mmtimer.expires += t->it.mmtimer.incr;
mmtimer_add_list(x);
} else {
/* Ensure we don't false trigger in mmtimer_interrupt */
t->it.mmtimer.clock = TIMER_OFF;
t->it.mmtimer.expires = 0;
kfree(x);
}
/* Set comparator for next timer, if there is one */
mmtimer_set_next_timer(nodeid);
t->it_overrun_last = t->it_overrun;
out:
spin_unlock_irqrestore(&mn->lock, flags);
}
static int sgi_timer_create(struct k_itimer *timer)
{
/* Insure that a newly created timer is off */
timer->it.mmtimer.clock = TIMER_OFF;
return 0;
}
/* This does not really delete a timer. It just insures
* that the timer is not active
*
* Assumption: it_lock is already held with irq's disabled
*/
static int sgi_timer_del(struct k_itimer *timr)
{
cnodeid_t nodeid = timr->it.mmtimer.node;
unsigned long irqflags;
spin_lock_irqsave(&timers[nodeid].lock, irqflags);
if (timr->it.mmtimer.clock != TIMER_OFF) {
unsigned long expires = timr->it.mmtimer.expires;
struct rb_node *n = timers[nodeid].timer_head.rb_node;
struct mmtimer *uninitialized_var(t);
int r = 0;
timr->it.mmtimer.clock = TIMER_OFF;
timr->it.mmtimer.expires = 0;
while (n) {
t = rb_entry(n, struct mmtimer, list);
if (t->timer == timr)
break;
if (expires < t->timer->it.mmtimer.expires)
n = n->rb_left;
else
n = n->rb_right;
}
if (!n) {
spin_unlock_irqrestore(&timers[nodeid].lock, irqflags);
return 0;
}
if (timers[nodeid].next == n) {
timers[nodeid].next = rb_next(n);
r = 1;
}
rb_erase(n, &timers[nodeid].timer_head);
kfree(t);
if (r) {
mmtimer_disable_int(cnodeid_to_nasid(nodeid),
COMPARATOR);
mmtimer_set_next_timer(nodeid);
}
}
spin_unlock_irqrestore(&timers[nodeid].lock, irqflags);
return 0;
}
/* Assumption: it_lock is already held with irq's disabled */
static void sgi_timer_get(struct k_itimer *timr, struct itimerspec64 *cur_setting)
{
if (timr->it.mmtimer.clock == TIMER_OFF) {
cur_setting->it_interval.tv_nsec = 0;
cur_setting->it_interval.tv_sec = 0;
cur_setting->it_value.tv_nsec = 0;
cur_setting->it_value.tv_sec =0;
return;
}
cur_setting->it_interval = ns_to_timespec64(timr->it.mmtimer.incr * sgi_clock_period);
cur_setting->it_value = ns_to_timespec64((timr->it.mmtimer.expires - rtc_time()) * sgi_clock_period);
}
static int sgi_timer_set(struct k_itimer *timr, int flags,
struct itimerspec64 *new_setting,
struct itimerspec64 *old_setting)
{
unsigned long when, period, irqflags;
int err = 0;
cnodeid_t nodeid;
struct mmtimer *base;
struct rb_node *n;
if (old_setting)
sgi_timer_get(timr, old_setting);
sgi_timer_del(timr);
when = timespec64_to_ns(&new_setting->it_value);
period = timespec64_to_ns(&new_setting->it_interval);
if (when == 0)
/* Clear timer */
return 0;
base = kmalloc(sizeof(struct mmtimer), GFP_KERNEL);
if (base == NULL)
return -ENOMEM;
if (flags & TIMER_ABSTIME) {
struct timespec64 n;
unsigned long now;
getnstimeofday64(&n);
now = timespec64_to_ns(&n);
if (when > now)
when -= now;
else
/* Fire the timer immediately */
when = 0;
}
/*
* Convert to sgi clock period. Need to keep rtc_time() as near as possible
* to getnstimeofday() in order to be as faithful as possible to the time
* specified.
*/
when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
period = (period + sgi_clock_period - 1) / sgi_clock_period;
/*
* We are allocating a local SHub comparator. If we would be moved to another
* cpu then another SHub may be local to us. Prohibit that by switching off
* preemption.
*/
preempt_disable();
nodeid = cpu_to_node(smp_processor_id());
/* Lock the node timer structure */
spin_lock_irqsave(&timers[nodeid].lock, irqflags);
base->timer = timr;
base->cpu = smp_processor_id();
timr->it.mmtimer.clock = TIMER_SET;
timr->it.mmtimer.node = nodeid;
timr->it.mmtimer.incr = period;
timr->it.mmtimer.expires = when;
n = timers[nodeid].next;
/* Add the new struct mmtimer to node's timer list */
mmtimer_add_list(base);
if (timers[nodeid].next == n) {
/* No need to reprogram comparator for now */
spin_unlock_irqrestore(&timers[nodeid].lock, irqflags);
preempt_enable();
return err;
}
/* We need to reprogram the comparator */
if (n)
mmtimer_disable_int(cnodeid_to_nasid(nodeid), COMPARATOR);
mmtimer_set_next_timer(nodeid);
/* Unlock the node timer structure */
spin_unlock_irqrestore(&timers[nodeid].lock, irqflags);
preempt_enable();
return err;
}
static int sgi_clock_getres(const clockid_t which_clock, struct timespec64 *tp)
{
tp->tv_sec = 0;
tp->tv_nsec = sgi_clock_period;
return 0;
}
static struct k_clock sgi_clock = {
.clock_set = sgi_clock_set,
.clock_get = sgi_clock_get,
.clock_getres = sgi_clock_getres,
.timer_create = sgi_timer_create,
.timer_set = sgi_timer_set,
.timer_del = sgi_timer_del,
.timer_get = sgi_timer_get
};
/**
* mmtimer_init - device initialization routine
*
* Does initial setup for the mmtimer device.
*/
static int __init mmtimer_init(void)
{
cnodeid_t node, maxn = -1;
if (!ia64_platform_is("sn2"))
return 0;
/*
* Sanity check the cycles/sec variable
*/
if (sn_rtc_cycles_per_second < 100000) {
printk(KERN_ERR "%s: unable to determine clock frequency\n",
MMTIMER_NAME);
goto out1;
}
mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
2) / sn_rtc_cycles_per_second;
if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, IRQF_PERCPU, MMTIMER_NAME, NULL)) {
printk(KERN_WARNING "%s: unable to allocate interrupt.",
MMTIMER_NAME);
goto out1;
}
if (misc_register(&mmtimer_miscdev)) {
printk(KERN_ERR "%s: failed to register device\n",
MMTIMER_NAME);
goto out2;
}
/* Get max numbered node, calculate slots needed */
for_each_online_node(node) {
maxn = node;
}
maxn++;
/* Allocate list of node ptrs to mmtimer_t's */
timers = kzalloc(sizeof(struct mmtimer_node)*maxn, GFP_KERNEL);
if (!timers) {
printk(KERN_ERR "%s: failed to allocate memory for device\n",
MMTIMER_NAME);
goto out3;
}
/* Initialize struct mmtimer's for each online node */
for_each_online_node(node) {
spin_lock_init(&timers[node].lock);
tasklet_init(&timers[node].tasklet, mmtimer_tasklet,
(unsigned long) node);
}
sgi_clock_period = NSEC_PER_SEC / sn_rtc_cycles_per_second;
posix_timers_register_clock(CLOCK_SGI_CYCLE, &sgi_clock);
printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
sn_rtc_cycles_per_second/(unsigned long)1E6);
return 0;
out3:
misc_deregister(&mmtimer_miscdev);
out2:
free_irq(SGI_MMTIMER_VECTOR, NULL);
out1:
return -1;
}
module_init(mmtimer_init);

View File

@ -1,22 +1,16 @@
menu "Clock Source drivers" menu "Clock Source drivers"
depends on !ARCH_USES_GETTIMEOFFSET depends on !ARCH_USES_GETTIMEOFFSET
config CLKSRC_OF config TIMER_OF
bool bool
select CLKSRC_PROBE depends on GENERIC_CLOCKEVENTS
select TIMER_PROBE
config CLKEVT_OF config TIMER_ACPI
bool bool
select CLKEVT_PROBE select TIMER_PROBE
config CLKSRC_ACPI config TIMER_PROBE
bool
select CLKSRC_PROBE
config CLKSRC_PROBE
bool
config CLKEVT_PROBE
bool bool
config CLKSRC_I8253 config CLKSRC_I8253
@ -65,14 +59,14 @@ config DW_APB_TIMER
config DW_APB_TIMER_OF config DW_APB_TIMER_OF
bool bool
select DW_APB_TIMER select DW_APB_TIMER
select CLKSRC_OF select TIMER_OF
config FTTMR010_TIMER config FTTMR010_TIMER
bool "Faraday Technology timer driver" if COMPILE_TEST bool "Faraday Technology timer driver" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
depends on HAS_IOMEM depends on HAS_IOMEM
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF select TIMER_OF
select MFD_SYSCON select MFD_SYSCON
help help
Enables support for the Faraday Technology timer block Enables support for the Faraday Technology timer block
@ -81,7 +75,7 @@ config FTTMR010_TIMER
config ROCKCHIP_TIMER config ROCKCHIP_TIMER
bool "Rockchip timer driver" if COMPILE_TEST bool "Rockchip timer driver" if COMPILE_TEST
depends on ARM || ARM64 depends on ARM || ARM64
select CLKSRC_OF select TIMER_OF
select CLKSRC_MMIO select CLKSRC_MMIO
help help
Enables the support for the rockchip timer driver. Enables the support for the rockchip timer driver.
@ -89,7 +83,7 @@ config ROCKCHIP_TIMER
config ARMADA_370_XP_TIMER config ARMADA_370_XP_TIMER
bool "Armada 370 and XP timer driver" if COMPILE_TEST bool "Armada 370 and XP timer driver" if COMPILE_TEST
depends on ARM depends on ARM
select CLKSRC_OF select TIMER_OF
select CLKSRC_MMIO select CLKSRC_MMIO
help help
Enables the support for the Armada 370 and XP timer driver. Enables the support for the Armada 370 and XP timer driver.
@ -104,7 +98,7 @@ config MESON6_TIMER
config ORION_TIMER config ORION_TIMER
bool "Orion timer driver" if COMPILE_TEST bool "Orion timer driver" if COMPILE_TEST
depends on ARM depends on ARM
select CLKSRC_OF select TIMER_OF
select CLKSRC_MMIO select CLKSRC_MMIO
help help
Enables the support for the Orion timer driver Enables the support for the Orion timer driver
@ -114,6 +108,7 @@ config SUN4I_TIMER
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
depends on HAS_IOMEM depends on HAS_IOMEM
select CLKSRC_MMIO select CLKSRC_MMIO
select TIMER_OF
help help
Enables support for the Sun4i timer. Enables support for the Sun4i timer.
@ -148,7 +143,7 @@ config ASM9260_TIMER
bool "ASM9260 timer driver" if COMPILE_TEST bool "ASM9260 timer driver" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF select TIMER_OF
help help
Enables support for the ASM9260 timer. Enables support for the ASM9260 timer.
@ -188,13 +183,6 @@ config ATLAS7_TIMER
help help
Enables support for the Atlas7 timer. Enables support for the Atlas7 timer.
config MOXART_TIMER
bool "Moxart timer driver" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS
select CLKSRC_MMIO
help
Enables support for the Moxart timer.
config MXS_TIMER config MXS_TIMER
bool "Mxs timer driver" if COMPILE_TEST bool "Mxs timer driver" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
@ -261,21 +249,21 @@ config CLKSRC_LPC32XX
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
depends on ARM depends on ARM
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF select TIMER_OF
help help
Support for the LPC32XX clocksource. Support for the LPC32XX clocksource.
config CLKSRC_PISTACHIO config CLKSRC_PISTACHIO
bool "Clocksource for Pistachio SoC" if COMPILE_TEST bool "Clocksource for Pistachio SoC" if COMPILE_TEST
depends on HAS_IOMEM depends on HAS_IOMEM
select CLKSRC_OF select TIMER_OF
help help
Enables the clocksource for the Pistachio SoC. Enables the clocksource for the Pistachio SoC.
config CLKSRC_TI_32K config CLKSRC_TI_32K
bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST bool "Texas Instruments 32.768 Hz Clocksource" if COMPILE_TEST
depends on GENERIC_SCHED_CLOCK depends on GENERIC_SCHED_CLOCK
select CLKSRC_OF if OF select TIMER_OF if OF
help help
This option enables support for Texas Instruments 32.768 Hz clocksource This option enables support for Texas Instruments 32.768 Hz clocksource
available on many OMAP-like platforms. available on many OMAP-like platforms.
@ -284,7 +272,7 @@ config CLKSRC_NPS
bool "NPS400 clocksource driver" if COMPILE_TEST bool "NPS400 clocksource driver" if COMPILE_TEST
depends on !PHYS_ADDR_T_64BIT depends on !PHYS_ADDR_T_64BIT
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF if OF select TIMER_OF if OF
help help
NPS400 clocksource support. NPS400 clocksource support.
Got 64 bit counter with update rate up to 1000MHz. Got 64 bit counter with update rate up to 1000MHz.
@ -299,12 +287,12 @@ config CLKSRC_MPS2
bool "Clocksource for MPS2 SoCs" if COMPILE_TEST bool "Clocksource for MPS2 SoCs" if COMPILE_TEST
depends on GENERIC_SCHED_CLOCK depends on GENERIC_SCHED_CLOCK
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF select TIMER_OF
config ARC_TIMERS config ARC_TIMERS
bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
select CLKSRC_OF select TIMER_OF
help help
These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
(ARC700 as well as ARC HS38). (ARC700 as well as ARC HS38).
@ -314,7 +302,7 @@ config ARC_TIMERS_64BIT
bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
depends on ARC_TIMERS depends on ARC_TIMERS
select CLKSRC_OF select TIMER_OF
help help
This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP) This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP)
RTC is implemented inside the core, while GFRC sits outside the core in RTC is implemented inside the core, while GFRC sits outside the core in
@ -323,8 +311,8 @@ config ARC_TIMERS_64BIT
config ARM_ARCH_TIMER config ARM_ARCH_TIMER
bool bool
select CLKSRC_OF if OF select TIMER_OF if OF
select CLKSRC_ACPI if ACPI select TIMER_ACPI if ACPI
config ARM_ARCH_TIMER_EVTSTREAM config ARM_ARCH_TIMER_EVTSTREAM
bool "Enable ARM architected timer event stream generation by default" bool "Enable ARM architected timer event stream generation by default"
@ -381,7 +369,7 @@ config ARM64_ERRATUM_858921
config ARM_GLOBAL_TIMER config ARM_GLOBAL_TIMER
bool "Support for the ARM global timer" if COMPILE_TEST bool "Support for the ARM global timer" if COMPILE_TEST
select CLKSRC_OF if OF select TIMER_OF if OF
depends on ARM depends on ARM
help help
This options enables support for the ARM global timer unit This options enables support for the ARM global timer unit
@ -390,7 +378,7 @@ config ARM_TIMER_SP804
bool "Support for Dual Timer SP804 module" bool "Support for Dual Timer SP804 module"
depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP
select CLKSRC_MMIO select CLKSRC_MMIO
select CLKSRC_OF if OF select TIMER_OF if OF
config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
bool bool
@ -401,19 +389,19 @@ config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
config ARMV7M_SYSTICK config ARMV7M_SYSTICK
bool "Support for the ARMv7M system time" if COMPILE_TEST bool "Support for the ARMv7M system time" if COMPILE_TEST
select CLKSRC_OF if OF select TIMER_OF if OF
select CLKSRC_MMIO select CLKSRC_MMIO
help help
This options enables support for the ARMv7M system timer unit This options enables support for the ARMv7M system timer unit
config ATMEL_PIT config ATMEL_PIT
select CLKSRC_OF if OF select TIMER_OF if OF
def_bool SOC_AT91SAM9 || SOC_SAMA5 def_bool SOC_AT91SAM9 || SOC_SAMA5
config ATMEL_ST config ATMEL_ST
bool "Atmel ST timer support" if COMPILE_TEST bool "Atmel ST timer support" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
select CLKSRC_OF select TIMER_OF
select MFD_SYSCON select MFD_SYSCON
help help
Support for the Atmel ST timer. Support for the Atmel ST timer.
@ -456,7 +444,7 @@ config VF_PIT_TIMER
config OXNAS_RPS_TIMER config OXNAS_RPS_TIMER
bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST bool "Oxford Semiconductor OXNAS RPS Timers driver" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS depends on GENERIC_CLOCKEVENTS
select CLKSRC_OF select TIMER_OF
select CLKSRC_MMIO select CLKSRC_MMIO
help help
This enables support for the Oxford Semiconductor OXNAS RPS timers. This enables support for the Oxford Semiconductor OXNAS RPS timers.
@ -467,7 +455,7 @@ config SYS_SUPPORTS_SH_CMT
config MTK_TIMER config MTK_TIMER
bool "Mediatek timer driver" if COMPILE_TEST bool "Mediatek timer driver" if COMPILE_TEST
depends on GENERIC_CLOCKEVENTS && HAS_IOMEM depends on GENERIC_CLOCKEVENTS && HAS_IOMEM
select CLKSRC_OF select TIMER_OF
select CLKSRC_MMIO select CLKSRC_MMIO
help help
Support for Mediatek timer driver. Support for Mediatek timer driver.
@ -540,7 +528,7 @@ config EM_TIMER_STI
config CLKSRC_QCOM config CLKSRC_QCOM
bool "Qualcomm MSM timer" if COMPILE_TEST bool "Qualcomm MSM timer" if COMPILE_TEST
depends on ARM depends on ARM
select CLKSRC_OF select TIMER_OF
help help
This enables the clocksource and the per CPU clockevent driver for the This enables the clocksource and the per CPU clockevent driver for the
Qualcomm SoCs. Qualcomm SoCs.
@ -548,7 +536,7 @@ config CLKSRC_QCOM
config CLKSRC_VERSATILE config CLKSRC_VERSATILE
bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST
depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
select CLKSRC_OF select TIMER_OF
default y if MFD_VEXPRESS_SYSREG default y if MFD_VEXPRESS_SYSREG
help help
This option enables clock source based on free running This option enables clock source based on free running
@ -559,12 +547,12 @@ config CLKSRC_VERSATILE
config CLKSRC_MIPS_GIC config CLKSRC_MIPS_GIC
bool bool
depends on MIPS_GIC depends on MIPS_GIC
select CLKSRC_OF select TIMER_OF
config CLKSRC_TANGO_XTAL config CLKSRC_TANGO_XTAL
bool "Clocksource for Tango SoC" if COMPILE_TEST bool "Clocksource for Tango SoC" if COMPILE_TEST
depends on ARM depends on ARM
select CLKSRC_OF select TIMER_OF
select CLKSRC_MMIO select CLKSRC_MMIO
help help
This enables the clocksource for Tango SoC This enables the clocksource for Tango SoC
@ -605,7 +593,7 @@ config CLKSRC_IMX_GPT
config CLKSRC_ST_LPC config CLKSRC_ST_LPC
bool "Low power clocksource found in the LPC" if COMPILE_TEST bool "Low power clocksource found in the LPC" if COMPILE_TEST
select CLKSRC_OF if OF select TIMER_OF if OF
depends on HAS_IOMEM depends on HAS_IOMEM
select CLKSRC_MMIO select CLKSRC_MMIO
help help

View File

@ -1,5 +1,5 @@
obj-$(CONFIG_CLKSRC_PROBE) += clksrc-probe.o obj-$(CONFIG_TIMER_OF) += timer-of.o
obj-$(CONFIG_CLKEVT_PROBE) += clkevt-probe.o obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
@ -26,7 +26,6 @@ obj-$(CONFIG_ORION_TIMER) += time-orion.o
obj-$(CONFIG_BCM2835_TIMER) += bcm2835_timer.o obj-$(CONFIG_BCM2835_TIMER) += bcm2835_timer.o
obj-$(CONFIG_CLPS711X_TIMER) += clps711x-timer.o obj-$(CONFIG_CLPS711X_TIMER) += clps711x-timer.o
obj-$(CONFIG_ATLAS7_TIMER) += timer-atlas7.o obj-$(CONFIG_ATLAS7_TIMER) += timer-atlas7.o
obj-$(CONFIG_MOXART_TIMER) += moxart_timer.o
obj-$(CONFIG_MXS_TIMER) += mxs_timer.o obj-$(CONFIG_MXS_TIMER) += mxs_timer.o
obj-$(CONFIG_CLKSRC_PXA) += pxa_timer.o obj-$(CONFIG_CLKSRC_PXA) += pxa_timer.o
obj-$(CONFIG_PRIMA2_TIMER) += timer-prima2.o obj-$(CONFIG_PRIMA2_TIMER) += timer-prima2.o

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@ -99,7 +99,7 @@ static int __init arc_cs_setup_gfrc(struct device_node *node)
return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq); return clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
} }
CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc); TIMER_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
#define AUX_RTC_CTRL 0x103 #define AUX_RTC_CTRL 0x103
#define AUX_RTC_LOW 0x104 #define AUX_RTC_LOW 0x104
@ -158,7 +158,7 @@ static int __init arc_cs_setup_rtc(struct device_node *node)
return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq); return clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
} }
CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc); TIMER_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
#endif #endif
@ -333,4 +333,4 @@ static int __init arc_of_timer_init(struct device_node *np)
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init); TIMER_OF_DECLARE(arc_clkevt, "snps,arc-timer", arc_of_timer_init);

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@ -1194,8 +1194,8 @@ static int __init arch_timer_of_init(struct device_node *np)
return arch_timer_common_init(); return arch_timer_common_init();
} }
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); TIMER_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init);
CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init); TIMER_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
static u32 __init static u32 __init
arch_timer_mem_frame_get_cntfrq(struct arch_timer_mem_frame *frame) arch_timer_mem_frame_get_cntfrq(struct arch_timer_mem_frame *frame)
@ -1382,7 +1382,7 @@ out:
kfree(timer_mem); kfree(timer_mem);
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", TIMER_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem",
arch_timer_mem_of_init); arch_timer_mem_of_init);
#ifdef CONFIG_ACPI_GTDT #ifdef CONFIG_ACPI_GTDT
@ -1516,5 +1516,5 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table)
return arch_timer_common_init(); return arch_timer_common_init();
} }
CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init); TIMER_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
#endif #endif

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@ -339,5 +339,5 @@ out_unmap:
} }
/* Only tested on r2p2 and r3p0 */ /* Only tested on r2p2 and r3p0 */
CLOCKSOURCE_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer", TIMER_OF_DECLARE(arm_gt, "arm,cortex-a9-global-timer",
global_timer_of_register); global_timer_of_register);

View File

@ -82,5 +82,5 @@ out_unmap:
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(arm_systick, "arm,armv7m-systick", TIMER_OF_DECLARE(arm_systick, "arm,armv7m-systick",
system_timer_of_register); system_timer_of_register);

View File

@ -238,5 +238,5 @@ static int __init asm9260_timer_init(struct device_node *np)
return 0; return 0;
} }
CLOCKSOURCE_OF_DECLARE(asm9260_timer, "alphascale,asm9260-timer", TIMER_OF_DECLARE(asm9260_timer, "alphascale,asm9260-timer",
asm9260_timer_init); asm9260_timer_init);

View File

@ -148,5 +148,5 @@ err_iounmap:
iounmap(base); iounmap(base);
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer", TIMER_OF_DECLARE(bcm2835, "brcm,bcm2835-system-timer",
bcm2835_timer_init); bcm2835_timer_init);

View File

@ -198,9 +198,9 @@ static int __init kona_timer_init(struct device_node *node)
return 0; return 0;
} }
CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init); TIMER_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
/* /*
* bcm,kona-timer is deprecated by brcm,kona-timer * bcm,kona-timer is deprecated by brcm,kona-timer
* being kept here for driver compatibility * being kept here for driver compatibility
*/ */
CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init); TIMER_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);

View File

@ -540,4 +540,4 @@ static int __init ttc_timer_init(struct device_node *timer)
return 0; return 0;
} }
CLOCKSOURCE_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init); TIMER_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init);

View File

@ -1,56 +0,0 @@
/*
* Copyright (c) 2016, Linaro Ltd. All rights reserved.
* Daniel Lezcano <daniel.lezcano@linaro.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/init.h>
#include <linux/of.h>
#include <linux/clockchips.h>
extern struct of_device_id __clkevt_of_table[];
static const struct of_device_id __clkevt_of_table_sentinel
__used __section(__clkevt_of_table_end);
int __init clockevent_probe(void)
{
struct device_node *np;
const struct of_device_id *match;
of_init_fn_1_ret init_func;
int ret, clockevents = 0;
for_each_matching_node_and_match(np, __clkevt_of_table, &match) {
if (!of_device_is_available(np))
continue;
init_func = match->data;
ret = init_func(np);
if (ret) {
pr_warn("Failed to initialize '%s' (%d)\n",
np->name, ret);
continue;
}
clockevents++;
}
if (!clockevents) {
pr_crit("%s: no matching clockevent found\n", __func__);
return -ENODEV;
}
return 0;
}

View File

@ -86,5 +86,5 @@ static int __init clksrc_dbx500_prcmu_init(struct device_node *node)
#endif #endif
return clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K); return clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
} }
CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4", TIMER_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
clksrc_dbx500_prcmu_init); clksrc_dbx500_prcmu_init);

View File

@ -132,4 +132,4 @@ static int __init st_clksrc_of_register(struct device_node *np)
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register); TIMER_OF_DECLARE(ddata, "st,stih407-lpc", st_clksrc_of_register);

View File

@ -103,7 +103,7 @@ void __init clps711x_clksrc_init(void __iomem *tc1_base, void __iomem *tc2_base,
BUG_ON(_clps711x_clkevt_init(tc2, tc2_base, irq)); BUG_ON(_clps711x_clkevt_init(tc2, tc2_base, irq));
} }
#ifdef CONFIG_CLKSRC_OF #ifdef CONFIG_TIMER_OF
static int __init clps711x_timer_init(struct device_node *np) static int __init clps711x_timer_init(struct device_node *np)
{ {
unsigned int irq = irq_of_parse_and_map(np, 0); unsigned int irq = irq_of_parse_and_map(np, 0);
@ -119,5 +119,5 @@ static int __init clps711x_timer_init(struct device_node *np)
return -EINVAL; return -EINVAL;
} }
} }
CLOCKSOURCE_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init); TIMER_OF_DECLARE(clps711x, "cirrus,ep7209-timer", clps711x_timer_init);
#endif #endif

View File

@ -167,7 +167,7 @@ static int __init dw_apb_timer_init(struct device_node *timer)
return 0; return 0;
} }
CLOCKSOURCE_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init); TIMER_OF_DECLARE(pc3x2_timer, "picochip,pc3x2-timer", dw_apb_timer_init);
CLOCKSOURCE_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init); TIMER_OF_DECLARE(apb_timer_osc, "snps,dw-apb-timer-osc", dw_apb_timer_init);
CLOCKSOURCE_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init); TIMER_OF_DECLARE(apb_timer_sp, "snps,dw-apb-timer-sp", dw_apb_timer_init);
CLOCKSOURCE_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init); TIMER_OF_DECLARE(apb_timer, "snps,dw-apb-timer", dw_apb_timer_init);

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@ -610,5 +610,5 @@ static int __init mct_init_ppi(struct device_node *np)
{ {
return mct_init_dt(np, MCT_INT_PPI); return mct_init_dt(np, MCT_INT_PPI);
} }
CLOCKSOURCE_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi); TIMER_OF_DECLARE(exynos4210, "samsung,exynos4210-mct", mct_init_spi);
CLOCKSOURCE_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi); TIMER_OF_DECLARE(exynos4412, "samsung,exynos4412-mct", mct_init_ppi);

View File

@ -329,13 +329,13 @@ static int __init ftm_timer_init(struct device_node *np)
priv->clkevt_base = of_iomap(np, 0); priv->clkevt_base = of_iomap(np, 0);
if (!priv->clkevt_base) { if (!priv->clkevt_base) {
pr_err("ftm: unable to map event timer registers\n"); pr_err("ftm: unable to map event timer registers\n");
goto err; goto err_clkevt;
} }
priv->clksrc_base = of_iomap(np, 1); priv->clksrc_base = of_iomap(np, 1);
if (!priv->clksrc_base) { if (!priv->clksrc_base) {
pr_err("ftm: unable to map source timer registers\n"); pr_err("ftm: unable to map source timer registers\n");
goto err; goto err_clksrc;
} }
ret = -EINVAL; ret = -EINVAL;
@ -366,7 +366,11 @@ static int __init ftm_timer_init(struct device_node *np)
return 0; return 0;
err: err:
iounmap(priv->clksrc_base);
err_clksrc:
iounmap(priv->clkevt_base);
err_clkevt:
kfree(priv); kfree(priv);
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init); TIMER_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);

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@ -187,5 +187,5 @@ free_clk:
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(h8300_16bit, "renesas,16bit-timer", TIMER_OF_DECLARE(h8300_16bit, "renesas,16bit-timer",
h8300_16timer_init); h8300_16timer_init);

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@ -207,4 +207,4 @@ free_clk:
return ret; return ret;
} }
CLOCKSOURCE_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init); TIMER_OF_DECLARE(h8300_8bit, "renesas,8bit-timer", h8300_8timer_init);

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