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drm/amdgpu: fix coding error of mmhub pg enablement

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MMHUB powergating should be disabled on navi12 and enabled on sienna
cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2020-07-06 10:54:26 +08:00 committed by Alex Deucher
parent 2373dd48fc
commit 1b0443b115
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/drm/amd/amdgpu/nv.c
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@ -707,8 +707,7 @@ static int nv_common_early_init(void *handle)
adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_VCN_DPG |
AMD_PG_SUPPORT_JPEG |
AMD_PG_SUPPORT_ATHUB |
AMD_PG_SUPPORT_MMHUB;
AMD_PG_SUPPORT_ATHUB;
/* guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
* as a consequence, the rev_id and external_rev_id are wrong.
* workaround it by hardcoding rev_id to 0 (default value).
@ -731,7 +730,8 @@ static int nv_common_early_init(void *handle)
adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_VCN_DPG |
AMD_PG_SUPPORT_JPEG |
AMD_PG_SUPPORT_ATHUB;
AMD_PG_SUPPORT_ATHUB |
AMD_PG_SUPPORT_MMHUB;
adev->external_rev_id = adev->rev_id + 0x28;
break;
default: