drm/amdkfd: Initialize HSA_CAP_ATS_PRESENT capability in topology codes
Move HSA_CAP_ATS_PRESENT initialization logic from kfd iommu codes to kfd topology codes. This removes kfd_iommu_device_init's dependency on kfd_topology_add_device. Also remove duplicate code setting the same. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -66,16 +66,8 @@ int kfd_iommu_device_init(struct kfd_dev *kfd)
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top_dev = kfd_topology_device_by_id(kfd->id);
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top_dev = kfd_topology_device_by_id(kfd->id);
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/*
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if (!kfd->device_info->needs_iommu_device)
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* Overwrite ATS capability according to needs_iommu_device to fix
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* potential missing corresponding bit in CRAT of BIOS.
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*/
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if (!kfd->device_info->needs_iommu_device) {
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top_dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;
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return 0;
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return 0;
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}
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top_dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
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iommu_info.flags = 0;
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iommu_info.flags = 0;
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err = amd_iommu_device_info(kfd->pdev, &iommu_info);
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err = amd_iommu_device_info(kfd->pdev, &iommu_info);
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@ -1330,17 +1330,24 @@ int kfd_topology_add_device(struct kfd_dev *gpu)
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dev->gpu->device_info->asic_family);
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dev->gpu->device_info->asic_family);
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}
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}
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/*
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* Overwrite ATS capability according to needs_iommu_device to fix
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* potential missing corresponding bit in CRAT of BIOS.
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*/
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if (dev->gpu->device_info->needs_iommu_device)
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dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
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else
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dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;
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/* Fix errors in CZ CRAT.
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/* Fix errors in CZ CRAT.
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* simd_count: Carrizo CRAT reports wrong simd_count, probably
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* simd_count: Carrizo CRAT reports wrong simd_count, probably
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* because it doesn't consider masked out CUs
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* because it doesn't consider masked out CUs
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* max_waves_per_simd: Carrizo reports wrong max_waves_per_simd
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* max_waves_per_simd: Carrizo reports wrong max_waves_per_simd
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* capability flag: Carrizo CRAT doesn't report IOMMU flags
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*/
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*/
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if (dev->gpu->device_info->asic_family == CHIP_CARRIZO) {
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if (dev->gpu->device_info->asic_family == CHIP_CARRIZO) {
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dev->node_props.simd_count =
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dev->node_props.simd_count =
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cu_info.simd_per_cu * cu_info.cu_active_number;
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cu_info.simd_per_cu * cu_info.cu_active_number;
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dev->node_props.max_waves_per_simd = 10;
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dev->node_props.max_waves_per_simd = 10;
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dev->node_props.capability |= HSA_CAP_ATS_PRESENT;
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}
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}
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ctx = amdgpu_ras_get_context((struct amdgpu_device *)(dev->gpu->kgd));
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ctx = amdgpu_ras_get_context((struct amdgpu_device *)(dev->gpu->kgd));
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