ASoC: Intel: add sst shim register start-end variables

the shim registers start and end can be useful while parsing the shim addresses,
so add these

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
Vinod Koul 2014-07-09 14:57:49 +05:30 committed by Mark Brown
parent 85e63007bb
commit 1ad0e33060

View File

@ -53,6 +53,10 @@
#define SST_CSR2 0x80
#define SST_LTRC 0xE0
#define SST_HDMC 0xE8
#define SST_SHIM_BEGIN SST_CSR
#define SST_SHIM_END SST_HDMC
#define SST_DBGO 0xF0
#define SST_SHIM_SIZE 0x100