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net:add one common config ARCH_WANT_RELAX_ORDER to support relax ordering

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Relax ordering(RO) is one feature of 82599 NIC, to enable this feature can
enhance the performance for some cpu architecure, such as SPARC and so on.
Currently it only supports one special cpu architecture(SPARC) in 82599
driver to enable RO feature, this is not very common for other cpu architecture
which really needs RO feature.
This patch add one common config CONFIG_ARCH_WANT_RELAX_ORDER to set RO feature,
and should define CONFIG_ARCH_WANT_RELAX_ORDER in sparc Kconfig firstly.

Signed-off-by: Mao Wenan <maowenan@huawei.com>
Reviewed-by: Alexander Duyck <alexander.duyck@gmail.com>
Reviewed-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Mao Wenan 2017-01-18 08:50:05 +08:00 committed by David S. Miller
parent 1e48aac14c
commit 1a8b6d76dc
3 changed files with 5 additions and 1 deletions
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3
arch/Kconfig
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@ -781,4 +781,7 @@ config VMAP_STACK
the stack to map directly to the KASAN shadow map using a formula the stack to map directly to the KASAN shadow map using a formula
that is incorrect if the stack is in vmalloc space. that is incorrect if the stack is in vmalloc space.
config ARCH_WANT_RELAX_ORDER
bool
source "kernel/gcov/Kconfig" source "kernel/gcov/Kconfig"

1
arch/sparc/Kconfig
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@ -44,6 +44,7 @@ config SPARC
select CPU_NO_EFFICIENT_FFS select CPU_NO_EFFICIENT_FFS
select HAVE_ARCH_HARDENED_USERCOPY select HAVE_ARCH_HARDENED_USERCOPY
select PROVE_LOCKING_SMALL if PROVE_LOCKING select PROVE_LOCKING_SMALL if PROVE_LOCKING
select ARCH_WANT_RELAX_ORDER
config SPARC32 config SPARC32
def_bool !64BIT def_bool !64BIT

2
drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
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@ -350,7 +350,7 @@ s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw)
} }
IXGBE_WRITE_FLUSH(hw); IXGBE_WRITE_FLUSH(hw);
#ifndef CONFIG_SPARC #ifndef CONFIG_ARCH_WANT_RELAX_ORDER
/* Disable relaxed ordering */ /* Disable relaxed ordering */
for (i = 0; i < hw->mac.max_tx_queues; i++) { for (i = 0; i < hw->mac.max_tx_queues; i++) {
u32 regval; u32 regval;