i2c: cadence: Added slave support
Added support for I2C slave functionality Signed-off-by: Chirag Parekh <chirag.parekh@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Radu Pirea
Wolfram Sang
parent
35eba185fd
commit
1a351b10b9
@ -23,6 +23,7 @@
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#define CDNS_I2C_ISR_OFFSET 0x10 /* IRQ Status Register, RW */
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#define CDNS_I2C_XFER_SIZE_OFFSET 0x14 /* Transfer Size Register, RW */
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#define CDNS_I2C_TIME_OUT_OFFSET 0x1C /* Time Out Register, RW */
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#define CDNS_I2C_IMR_OFFSET 0x20 /* IRQ Mask Register, RO */
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#define CDNS_I2C_IER_OFFSET 0x24 /* IRQ Enable Register, WO */
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#define CDNS_I2C_IDR_OFFSET 0x28 /* IRQ Disable Register, WO */
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@ -40,9 +41,17 @@
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#define CDNS_I2C_CR_DIVB_SHIFT 8
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#define CDNS_I2C_CR_DIVB_MASK (0x3f << CDNS_I2C_CR_DIVB_SHIFT)
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#define CDNS_I2C_CR_MASTER_EN_MASK (CDNS_I2C_CR_NEA | \
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CDNS_I2C_CR_ACK_EN | \
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CDNS_I2C_CR_MS)
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#define CDNS_I2C_CR_SLAVE_EN_MASK ~CDNS_I2C_CR_MASTER_EN_MASK
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/* Status Register Bit mask definitions */
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#define CDNS_I2C_SR_BA BIT(8)
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#define CDNS_I2C_SR_TXDV BIT(6)
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#define CDNS_I2C_SR_RXDV BIT(5)
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#define CDNS_I2C_SR_RXRW BIT(3)
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/*
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* I2C Address Register Bit mask definitions
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@ -91,6 +100,14 @@
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CDNS_I2C_IXR_DATA | \
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CDNS_I2C_IXR_COMP)
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#define CDNS_I2C_IXR_SLAVE_INTR_MASK (CDNS_I2C_IXR_RX_UNF | \
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CDNS_I2C_IXR_TX_OVF | \
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CDNS_I2C_IXR_RX_OVF | \
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CDNS_I2C_IXR_TO | \
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CDNS_I2C_IXR_NACK | \
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CDNS_I2C_IXR_DATA | \
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CDNS_I2C_IXR_COMP)
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#define CDNS_I2C_TIMEOUT msecs_to_jiffies(1000)
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/* timeout for pm runtime autosuspend */
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#define CNDS_I2C_PM_TIMEOUT 1000 /* ms */
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@ -114,6 +131,32 @@
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#define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
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#define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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/**
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* enum cdns_i2c_mode - I2C Controller current operating mode
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*
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* @CDNS_I2C_MODE_SLAVE: I2C controller operating in slave mode
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* @CDNS_I2C_MODE_MASTER: I2C Controller operating in master mode
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*/
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enum cdns_i2c_mode {
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CDNS_I2C_MODE_SLAVE,
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CDNS_I2C_MODE_MASTER,
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};
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/**
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* enum cdns_i2c_slave_mode - Slave state when I2C is operating in slave mode
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*
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* @CDNS_I2C_SLAVE_STATE_IDLE: I2C slave idle
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* @CDNS_I2C_SLAVE_STATE_SEND: I2C slave sending data to master
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* @CDNS_I2C_SLAVE_STATE_RECV: I2C slave receiving data from master
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*/
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enum cdns_i2c_slave_state {
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CDNS_I2C_SLAVE_STATE_IDLE,
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CDNS_I2C_SLAVE_STATE_SEND,
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CDNS_I2C_SLAVE_STATE_RECV,
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};
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#endif
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/**
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* struct cdns_i2c - I2C device private data structure
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*
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@ -135,6 +178,10 @@
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* @clk: Pointer to struct clk
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* @clk_rate_change_nb: Notifier block for clock rate changes
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* @quirks: flag for broken hold bit usage in r1p10
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* @ctrl_reg_diva_divb: value of fields DIV_A and DIV_B from CR register
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* @slave: Registered slave instance.
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* @dev_mode: I2C operating role(master/slave).
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* @slave_state: I2C Slave state(idle/read/write).
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*/
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struct cdns_i2c {
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struct device *dev;
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@ -155,6 +202,12 @@ struct cdns_i2c {
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struct clk *clk;
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struct notifier_block clk_rate_change_nb;
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u32 quirks;
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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u16 ctrl_reg_diva_divb;
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struct i2c_client *slave;
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enum cdns_i2c_mode dev_mode;
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enum cdns_i2c_slave_state slave_state;
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#endif
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};
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struct cdns_platform_data {
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@ -183,17 +236,155 @@ static inline bool cdns_is_holdquirk(struct cdns_i2c *id, bool hold_wrkaround)
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(id->curr_recv_count == CDNS_I2C_FIFO_DEPTH + 1));
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}
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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static void cdns_i2c_set_mode(enum cdns_i2c_mode mode, struct cdns_i2c *id)
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{
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/* Disable all interrupts */
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cdns_i2c_writereg(CDNS_I2C_IXR_ALL_INTR_MASK, CDNS_I2C_IDR_OFFSET);
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/* Clear FIFO and transfer size */
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cdns_i2c_writereg(CDNS_I2C_CR_CLR_FIFO, CDNS_I2C_CR_OFFSET);
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/* Update device mode and state */
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id->dev_mode = mode;
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id->slave_state = CDNS_I2C_SLAVE_STATE_IDLE;
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switch (mode) {
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case CDNS_I2C_MODE_MASTER:
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/* Enable i2c master */
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cdns_i2c_writereg(id->ctrl_reg_diva_divb |
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CDNS_I2C_CR_MASTER_EN_MASK,
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CDNS_I2C_CR_OFFSET);
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/*
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* This delay is needed to give the IP some time to switch to
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* the master mode. With lower values(like 110 us) i2cdetect
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* will not detect any slave and without this delay, the IP will
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* trigger a timeout interrupt.
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*/
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usleep_range(115, 125);
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break;
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case CDNS_I2C_MODE_SLAVE:
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/* Enable i2c slave */
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cdns_i2c_writereg(id->ctrl_reg_diva_divb &
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CDNS_I2C_CR_SLAVE_EN_MASK,
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CDNS_I2C_CR_OFFSET);
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/* Setting slave address */
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cdns_i2c_writereg(id->slave->addr & CDNS_I2C_ADDR_MASK,
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CDNS_I2C_ADDR_OFFSET);
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/* Enable slave send/receive interrupts */
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cdns_i2c_writereg(CDNS_I2C_IXR_SLAVE_INTR_MASK,
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CDNS_I2C_IER_OFFSET);
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break;
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}
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}
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static void cdns_i2c_slave_rcv_data(struct cdns_i2c *id)
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{
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u8 bytes;
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unsigned char data;
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/* Prepare backend for data reception */
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if (id->slave_state == CDNS_I2C_SLAVE_STATE_IDLE) {
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id->slave_state = CDNS_I2C_SLAVE_STATE_RECV;
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i2c_slave_event(id->slave, I2C_SLAVE_WRITE_REQUESTED, NULL);
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}
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/* Fetch number of bytes to receive */
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bytes = cdns_i2c_readreg(CDNS_I2C_XFER_SIZE_OFFSET);
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/* Read data and send to backend */
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while (bytes--) {
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data = cdns_i2c_readreg(CDNS_I2C_DATA_OFFSET);
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i2c_slave_event(id->slave, I2C_SLAVE_WRITE_RECEIVED, &data);
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}
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}
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static void cdns_i2c_slave_send_data(struct cdns_i2c *id)
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{
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u8 data;
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/* Prepare backend for data transmission */
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if (id->slave_state == CDNS_I2C_SLAVE_STATE_IDLE) {
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id->slave_state = CDNS_I2C_SLAVE_STATE_SEND;
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i2c_slave_event(id->slave, I2C_SLAVE_READ_REQUESTED, &data);
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} else {
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i2c_slave_event(id->slave, I2C_SLAVE_READ_PROCESSED, &data);
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}
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/* Send data over bus */
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cdns_i2c_writereg(data, CDNS_I2C_DATA_OFFSET);
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}
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/**
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* cdns_i2c_isr - Interrupt handler for the I2C device
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* @irq: irq number for the I2C device
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* @ptr: void pointer to cdns_i2c structure
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* cdns_i2c_slave_isr - Interrupt handler for the I2C device in slave role
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* @ptr: Pointer to I2C device private data
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*
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* This function handles the data interrupt, transfer complete interrupt and
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* the error interrupts of the I2C device.
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* This function handles the data interrupt and transfer complete interrupt of
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* the I2C device in slave role.
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*
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* Return: IRQ_HANDLED always
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*/
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static irqreturn_t cdns_i2c_isr(int irq, void *ptr)
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static irqreturn_t cdns_i2c_slave_isr(void *ptr)
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{
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struct cdns_i2c *id = ptr;
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unsigned int isr_status, i2c_status;
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/* Fetch the interrupt status */
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isr_status = cdns_i2c_readreg(CDNS_I2C_ISR_OFFSET);
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cdns_i2c_writereg(isr_status, CDNS_I2C_ISR_OFFSET);
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/* Ignore masked interrupts */
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isr_status &= ~cdns_i2c_readreg(CDNS_I2C_IMR_OFFSET);
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/* Fetch transfer mode (send/receive) */
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i2c_status = cdns_i2c_readreg(CDNS_I2C_SR_OFFSET);
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/* Handle data send/receive */
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if (i2c_status & CDNS_I2C_SR_RXRW) {
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/* Send data to master */
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if (isr_status & CDNS_I2C_IXR_DATA)
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cdns_i2c_slave_send_data(id);
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if (isr_status & CDNS_I2C_IXR_COMP) {
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id->slave_state = CDNS_I2C_SLAVE_STATE_IDLE;
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i2c_slave_event(id->slave, I2C_SLAVE_STOP, NULL);
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}
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} else {
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/* Receive data from master */
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if (isr_status & CDNS_I2C_IXR_DATA)
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cdns_i2c_slave_rcv_data(id);
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if (isr_status & CDNS_I2C_IXR_COMP) {
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cdns_i2c_slave_rcv_data(id);
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id->slave_state = CDNS_I2C_SLAVE_STATE_IDLE;
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i2c_slave_event(id->slave, I2C_SLAVE_STOP, NULL);
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}
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}
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/* Master indicated xfer stop or fifo underflow/overflow */
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if (isr_status & (CDNS_I2C_IXR_NACK | CDNS_I2C_IXR_RX_OVF |
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CDNS_I2C_IXR_RX_UNF | CDNS_I2C_IXR_TX_OVF)) {
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id->slave_state = CDNS_I2C_SLAVE_STATE_IDLE;
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i2c_slave_event(id->slave, I2C_SLAVE_STOP, NULL);
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cdns_i2c_writereg(CDNS_I2C_CR_CLR_FIFO, CDNS_I2C_CR_OFFSET);
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}
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return IRQ_HANDLED;
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}
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#endif
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/**
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* cdns_i2c_master_isr - Interrupt handler for the I2C device in master role
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* @ptr: Pointer to I2C device private data
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*
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* This function handles the data interrupt, transfer complete interrupt and
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* the error interrupts of the I2C device in master role.
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*
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* Return: IRQ_HANDLED always
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*/
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static irqreturn_t cdns_i2c_master_isr(void *ptr)
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{
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unsigned int isr_status, avail_bytes, updatetx;
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unsigned int bytes_to_send;
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@ -357,6 +548,27 @@ static irqreturn_t cdns_i2c_isr(int irq, void *ptr)
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return status;
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}
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/**
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* cdns_i2c_isr - Interrupt handler for the I2C device
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* @irq: irq number for the I2C device
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* @ptr: void pointer to cdns_i2c structure
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*
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* This function passes the control to slave/master based on current role of
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* i2c controller.
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*
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* Return: IRQ_HANDLED always
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*/
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static irqreturn_t cdns_i2c_isr(int irq, void *ptr)
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{
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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struct cdns_i2c *id = ptr;
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if (id->dev_mode == CDNS_I2C_MODE_SLAVE)
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return cdns_i2c_slave_isr(ptr);
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#endif
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return cdns_i2c_master_isr(ptr);
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}
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/**
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* cdns_i2c_mrecv - Prepare and start a master receive operation
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* @id: pointer to the i2c device structure
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@ -577,10 +789,28 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
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u32 reg;
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struct cdns_i2c *id = adap->algo_data;
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bool hold_quirk;
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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bool change_role = false;
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#endif
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ret = pm_runtime_get_sync(id->dev);
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if (ret < 0)
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return ret;
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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/* Check i2c operating mode and switch if possible */
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if (id->dev_mode == CDNS_I2C_MODE_SLAVE) {
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if (id->slave_state != CDNS_I2C_SLAVE_STATE_IDLE)
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return -EAGAIN;
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/* Set mode to master */
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cdns_i2c_set_mode(CDNS_I2C_MODE_MASTER, id);
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/* Mark flag to change role once xfer is completed */
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change_role = true;
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}
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#endif
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/* Check if the bus is free */
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if (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) & CDNS_I2C_SR_BA) {
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ret = -EAGAIN;
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@ -639,7 +869,15 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
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}
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ret = num;
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out:
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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/* Switch i2c mode to slave */
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if (change_role)
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cdns_i2c_set_mode(CDNS_I2C_MODE_SLAVE, id);
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#endif
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pm_runtime_mark_last_busy(id->dev);
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pm_runtime_put_autosuspend(id->dev);
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return ret;
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@ -653,14 +891,67 @@ out:
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*/
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static u32 cdns_i2c_func(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR |
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(I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) |
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I2C_FUNC_SMBUS_BLOCK_DATA;
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u32 func = I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR |
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(I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) |
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I2C_FUNC_SMBUS_BLOCK_DATA;
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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func |= I2C_FUNC_SLAVE;
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#endif
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return func;
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}
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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static int cdns_reg_slave(struct i2c_client *slave)
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{
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int ret;
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struct cdns_i2c *id = container_of(slave->adapter, struct cdns_i2c,
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adap);
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if (id->slave)
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return -EBUSY;
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if (slave->flags & I2C_CLIENT_TEN)
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return -EAFNOSUPPORT;
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ret = pm_runtime_get_sync(id->dev);
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if (ret < 0)
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return ret;
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/* Store slave information */
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id->slave = slave;
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/* Enable I2C slave */
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cdns_i2c_set_mode(CDNS_I2C_MODE_SLAVE, id);
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return 0;
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}
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static int cdns_unreg_slave(struct i2c_client *slave)
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{
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struct cdns_i2c *id = container_of(slave->adapter, struct cdns_i2c,
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adap);
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pm_runtime_put(id->dev);
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/* Remove slave information */
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id->slave = NULL;
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/* Enable I2C master */
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cdns_i2c_set_mode(CDNS_I2C_MODE_MASTER, id);
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return 0;
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}
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#endif
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static const struct i2c_algorithm cdns_i2c_algo = {
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.master_xfer = cdns_i2c_master_xfer,
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.functionality = cdns_i2c_func,
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#if IS_ENABLED(CONFIG_I2C_SLAVE)
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.reg_slave = cdns_reg_slave,
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.unreg_slave = cdns_unreg_slave,
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#endif
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};
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/**
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@ -755,7 +1046,10 @@ static int cdns_i2c_setclk(unsigned long clk_in, struct cdns_i2c *id)
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ctrl_reg |= ((div_a << CDNS_I2C_CR_DIVA_SHIFT) |
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(div_b << CDNS_I2C_CR_DIVB_SHIFT));
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cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
|
||||
|
||||
#if IS_ENABLED(CONFIG_I2C_SLAVE)
|
||||
id->ctrl_reg_diva_divb = ctrl_reg & (CDNS_I2C_CR_DIVA_MASK |
|
||||
CDNS_I2C_CR_DIVB_MASK);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -948,8 +1242,12 @@ static int cdns_i2c_probe(struct platform_device *pdev)
|
||||
if (ret || (id->i2c_clk > I2C_MAX_FAST_MODE_FREQ))
|
||||
id->i2c_clk = I2C_MAX_STANDARD_MODE_FREQ;
|
||||
|
||||
cdns_i2c_writereg(CDNS_I2C_CR_ACK_EN | CDNS_I2C_CR_NEA | CDNS_I2C_CR_MS,
|
||||
CDNS_I2C_CR_OFFSET);
|
||||
#if IS_ENABLED(CONFIG_I2C_SLAVE)
|
||||
/* Set initial mode to master */
|
||||
id->dev_mode = CDNS_I2C_MODE_MASTER;
|
||||
id->slave_state = CDNS_I2C_SLAVE_STATE_IDLE;
|
||||
#endif
|
||||
cdns_i2c_writereg(CDNS_I2C_CR_MASTER_EN_MASK, CDNS_I2C_CR_OFFSET);
|
||||
|
||||
ret = cdns_i2c_setclk(id->input_clk, id);
|
||||
if (ret) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user