percpu: align percpu readmostly subsection to cacheline
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
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@@ -155,7 +155,7 @@ SECTIONS
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INIT_RAM_FS
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}
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PERCPU(PAGE_SIZE)
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PERCPU(XCHAL_ICACHE_LINESIZE, PAGE_SIZE)
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/* We need this dummy segment here */
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