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powerpc/fsl: Added rcw registers to global utility registers

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The RCW registers are required for the future clock binding implementation.

Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com>
Change-Id: Ic36dd8bc2959aa7f97fb6fd7bbb8420822fef0a9
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Igal Liberman 2014-10-30 11:15:47 +02:00 committed by Scott Wood
parent 45c22ed744
commit 19bc4808f9
1 changed files with 4 additions and 1 deletions
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5
arch/powerpc/include/asm/fsl_guts.h
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@ -68,7 +68,10 @@ struct ccsr_guts {
u8 res0b4[0xc0 - 0xb4];
__be32 iovselsr; /* 0x.00c0 - I/O voltage select status register
Called 'elbcvselcr' on 86xx SOCs */
u8 res0c4[0x224 - 0xc4];
u8 res0c4[0x100 - 0xc4];
__be32 rcwsr[16]; /* 0x.0100 - Reset Control Word Status registers
There are 16 registers */
u8 res140[0x224 - 0x140];
__be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
__be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
u8 res22c[0x604 - 0x22c];