forked from Minki/linux
PCI: generic, thunder: Use generic ECAM API
Use functions provided by drivers/pci/ecam.h for mapping the config space in drivers/pci/host/pci-host-common.c, and update its users to use 'struct pci_config_window' and 'struct pci_ecam_ops'. The changes are mostly to use 'struct pci_config_window' in place of 'struct gen_pci'. Some of the fields of gen_pci were only used temporarily and can be eliminated by using local variables or function arguments, these are not carried over to struct pci_config_window. pci-thunder-ecam.c and pci-thunder-pem.c are the only users of the pci_host_common_probe function and the gen_pci structure; these have been updated to use the new API as well. The patch does not introduce any functional changes other than a very minor one: with the new code, on 64-bit platforms, we do just a single ioremap for the whole config space. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
35ff9477d8
commit
1958e7173d
@ -59,4 +59,9 @@ void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
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/* default ECAM ops */
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extern struct pci_ecam_ops pci_generic_ecam_ops;
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#ifdef CONFIG_PCI_HOST_GENERIC
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/* for DT-based PCI controllers that support ECAM */
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int pci_host_common_probe(struct platform_device *pdev,
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struct pci_ecam_ops *ops);
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#endif
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#endif
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@ -77,6 +77,7 @@ config PCI_RCAR_GEN2_PCIE
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config PCI_HOST_COMMON
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bool
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select PCI_ECAM
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config PCI_HOST_GENERIC
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bool "Generic PCI host controller"
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@ -22,27 +22,21 @@
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#include <linux/of_pci.h>
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#include <linux/platform_device.h>
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#include "pci-host-common.h"
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#include "../ecam.h"
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static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
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{
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pci_free_resource_list(&pci->resources);
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}
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static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
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static int gen_pci_parse_request_of_pci_ranges(struct device *dev,
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struct list_head *resources, struct resource **bus_range)
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{
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int err, res_valid = 0;
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struct device *dev = pci->host.dev.parent;
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struct device_node *np = dev->of_node;
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resource_size_t iobase;
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struct resource_entry *win;
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err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources,
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&iobase);
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err = of_pci_get_host_bridge_resources(np, 0, 0xff, resources, &iobase);
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if (err)
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return err;
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resource_list_for_each_entry(win, &pci->resources) {
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resource_list_for_each_entry(win, resources) {
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struct resource *parent, *res = win->res;
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switch (resource_type(res)) {
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@ -60,7 +54,7 @@ static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
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res_valid |= !(res->flags & IORESOURCE_PREFETCH);
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break;
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case IORESOURCE_BUS:
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pci->cfg.bus_range = res;
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*bus_range = res;
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default:
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continue;
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}
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@ -79,65 +73,60 @@ static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
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return 0;
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out_release_res:
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gen_pci_release_of_pci_ranges(pci);
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return err;
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}
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static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
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static void gen_pci_unmap_cfg(void *ptr)
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{
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pci_ecam_free((struct pci_config_window *)ptr);
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}
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static struct pci_config_window *gen_pci_init(struct device *dev,
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struct list_head *resources, struct pci_ecam_ops *ops)
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{
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int err;
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u8 bus_max;
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resource_size_t busn;
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struct resource *bus_range;
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struct device *dev = pci->host.dev.parent;
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struct device_node *np = dev->of_node;
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u32 sz = 1 << pci->cfg.ops->bus_shift;
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struct resource cfgres;
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struct resource *bus_range = NULL;
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struct pci_config_window *cfg;
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err = of_address_to_resource(np, 0, &pci->cfg.res);
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/* Parse our PCI ranges and request their resources */
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err = gen_pci_parse_request_of_pci_ranges(dev, resources, &bus_range);
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if (err)
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goto err_out;
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err = of_address_to_resource(dev->of_node, 0, &cfgres);
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if (err) {
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dev_err(dev, "missing \"reg\" property\n");
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return err;
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goto err_out;
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}
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/* Limit the bus-range to fit within reg */
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bus_max = pci->cfg.bus_range->start +
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(resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1;
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pci->cfg.bus_range->end = min_t(resource_size_t,
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pci->cfg.bus_range->end, bus_max);
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pci->cfg.win = devm_kcalloc(dev, resource_size(pci->cfg.bus_range),
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sizeof(*pci->cfg.win), GFP_KERNEL);
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if (!pci->cfg.win)
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return -ENOMEM;
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/* Map our Configuration Space windows */
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if (!devm_request_mem_region(dev, pci->cfg.res.start,
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resource_size(&pci->cfg.res),
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"Configuration Space"))
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return -ENOMEM;
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bus_range = pci->cfg.bus_range;
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for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
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u32 idx = busn - bus_range->start;
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pci->cfg.win[idx] = devm_ioremap(dev,
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pci->cfg.res.start + idx * sz,
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sz);
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if (!pci->cfg.win[idx])
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return -ENOMEM;
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cfg = pci_ecam_create(dev, &cfgres, bus_range, ops);
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if (IS_ERR(cfg)) {
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err = PTR_ERR(cfg);
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goto err_out;
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}
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return 0;
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err = devm_add_action(dev, gen_pci_unmap_cfg, cfg);
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if (err) {
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gen_pci_unmap_cfg(cfg);
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goto err_out;
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}
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return cfg;
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err_out:
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pci_free_resource_list(resources);
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return ERR_PTR(err);
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}
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int pci_host_common_probe(struct platform_device *pdev,
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struct gen_pci *pci)
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struct pci_ecam_ops *ops)
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{
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int err;
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const char *type;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct pci_bus *bus, *child;
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struct pci_config_window *cfg;
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struct list_head resources;
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type = of_get_property(np, "device_type", NULL);
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if (!type || strcmp(type, "pci")) {
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@ -147,29 +136,18 @@ int pci_host_common_probe(struct platform_device *pdev,
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of_pci_check_probe_only();
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pci->host.dev.parent = dev;
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INIT_LIST_HEAD(&pci->host.windows);
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INIT_LIST_HEAD(&pci->resources);
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/* Parse our PCI ranges and request their resources */
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err = gen_pci_parse_request_of_pci_ranges(pci);
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if (err)
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return err;
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/* Parse and map our Configuration Space windows */
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err = gen_pci_parse_map_cfg_windows(pci);
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if (err) {
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gen_pci_release_of_pci_ranges(pci);
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return err;
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}
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INIT_LIST_HEAD(&resources);
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cfg = gen_pci_init(dev, &resources, ops);
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if (IS_ERR(cfg))
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return PTR_ERR(cfg);
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/* Do not reassign resources if probe only */
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if (!pci_has_flag(PCI_PROBE_ONLY))
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pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
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bus = pci_scan_root_bus(dev, pci->cfg.bus_range->start,
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&pci->cfg.ops->ops, pci, &pci->resources);
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bus = pci_scan_root_bus(dev, cfg->busr.start, &ops->pci_ops, cfg,
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&resources);
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if (!bus) {
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dev_err(dev, "Scanning rootbus failed");
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return -ENODEV;
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@ -1,47 +0,0 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Copyright (C) 2014 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#ifndef _PCI_HOST_COMMON_H
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#define _PCI_HOST_COMMON_H
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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struct gen_pci_cfg_bus_ops {
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u32 bus_shift;
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struct pci_ops ops;
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};
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struct gen_pci_cfg_windows {
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struct resource res;
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struct resource *bus_range;
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void __iomem **win;
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struct gen_pci_cfg_bus_ops *ops;
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};
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struct gen_pci {
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struct pci_host_bridge host;
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struct gen_pci_cfg_windows cfg;
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struct list_head resources;
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};
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int pci_host_common_probe(struct platform_device *pdev,
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struct gen_pci *pci);
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#endif /* _PCI_HOST_COMMON_H */
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@ -25,41 +25,12 @@
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#include <linux/of_pci.h>
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#include <linux/platform_device.h>
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#include "pci-host-common.h"
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#include "../ecam.h"
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static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus,
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unsigned int devfn,
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int where)
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{
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struct gen_pci *pci = bus->sysdata;
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resource_size_t idx = bus->number - pci->cfg.bus_range->start;
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return pci->cfg.win[idx] + ((devfn << 8) | where);
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}
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static struct gen_pci_cfg_bus_ops gen_pci_cfg_cam_bus_ops = {
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static struct pci_ecam_ops gen_pci_cfg_cam_bus_ops = {
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.bus_shift = 16,
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.ops = {
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.map_bus = gen_pci_map_cfg_bus_cam,
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.read = pci_generic_config_read,
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.write = pci_generic_config_write,
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}
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};
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static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus,
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unsigned int devfn,
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int where)
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{
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struct gen_pci *pci = bus->sysdata;
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resource_size_t idx = bus->number - pci->cfg.bus_range->start;
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return pci->cfg.win[idx] + ((devfn << 12) | where);
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}
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static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = {
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.bus_shift = 20,
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.ops = {
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.map_bus = gen_pci_map_cfg_bus_ecam,
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.pci_ops = {
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.map_bus = pci_ecam_map_bus,
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.read = pci_generic_config_read,
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.write = pci_generic_config_write,
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}
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@ -70,25 +41,22 @@ static const struct of_device_id gen_pci_of_match[] = {
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.data = &gen_pci_cfg_cam_bus_ops },
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{ .compatible = "pci-host-ecam-generic",
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.data = &gen_pci_cfg_ecam_bus_ops },
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.data = &pci_generic_ecam_ops },
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{ },
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};
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MODULE_DEVICE_TABLE(of, gen_pci_of_match);
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static int gen_pci_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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const struct of_device_id *of_id;
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struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
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struct pci_ecam_ops *ops;
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if (!pci)
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return -ENOMEM;
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of_id = of_match_node(gen_pci_of_match, pdev->dev.of_node);
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ops = (struct pci_ecam_ops *)of_id->data;
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of_id = of_match_node(gen_pci_of_match, dev->of_node);
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pci->cfg.ops = (struct gen_pci_cfg_bus_ops *)of_id->data;
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return pci_host_common_probe(pdev, pci);
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return pci_host_common_probe(pdev, ops);
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}
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static struct platform_driver gen_pci_driver = {
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@ -13,18 +13,7 @@
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include "pci-host-common.h"
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/* Mapping is standard ECAM */
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static void __iomem *thunder_ecam_map_bus(struct pci_bus *bus,
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unsigned int devfn,
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int where)
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{
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struct gen_pci *pci = bus->sysdata;
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resource_size_t idx = bus->number - pci->cfg.bus_range->start;
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return pci->cfg.win[idx] + ((devfn << 12) | where);
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}
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#include "../ecam.h"
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static void set_val(u32 v, int where, int size, u32 *val)
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{
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@ -99,7 +88,7 @@ static int handle_ea_bar(u32 e0, int bar, struct pci_bus *bus,
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static int thunder_ecam_p2_config_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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struct gen_pci *pci = bus->sysdata;
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struct pci_config_window *cfg = bus->sysdata;
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int where_a = where & ~3;
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void __iomem *addr;
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u32 node_bits;
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@ -129,7 +118,7 @@ static int thunder_ecam_p2_config_read(struct pci_bus *bus, unsigned int devfn,
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* the config space access window. Since we are working with
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* the high-order 32 bits, shift everything down by 32 bits.
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*/
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node_bits = (pci->cfg.res.start >> 32) & (1 << 12);
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node_bits = (cfg->res.start >> 32) & (1 << 12);
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v |= node_bits;
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set_val(v, where, size, val);
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@ -358,36 +347,24 @@ static int thunder_ecam_config_write(struct pci_bus *bus, unsigned int devfn,
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return pci_generic_config_write(bus, devfn, where, size, val);
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}
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static struct gen_pci_cfg_bus_ops thunder_ecam_bus_ops = {
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static struct pci_ecam_ops pci_thunder_ecam_ops = {
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.bus_shift = 20,
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.ops = {
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.map_bus = thunder_ecam_map_bus,
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.pci_ops = {
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.map_bus = pci_ecam_map_bus,
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.read = thunder_ecam_config_read,
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.write = thunder_ecam_config_write,
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}
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};
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static const struct of_device_id thunder_ecam_of_match[] = {
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{ .compatible = "cavium,pci-host-thunder-ecam",
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.data = &thunder_ecam_bus_ops },
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{ .compatible = "cavium,pci-host-thunder-ecam" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, thunder_ecam_of_match);
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static int thunder_ecam_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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const struct of_device_id *of_id;
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struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
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if (!pci)
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return -ENOMEM;
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of_id = of_match_node(thunder_ecam_of_match, dev->of_node);
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pci->cfg.ops = (struct gen_pci_cfg_bus_ops *)of_id->data;
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return pci_host_common_probe(pdev, pci);
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return pci_host_common_probe(pdev, &pci_thunder_ecam_ops);
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}
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static struct platform_driver thunder_ecam_driver = {
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@ -20,34 +20,22 @@
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#include <linux/of_pci.h>
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#include <linux/platform_device.h>
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#include "pci-host-common.h"
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#include "../ecam.h"
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#define PEM_CFG_WR 0x28
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#define PEM_CFG_RD 0x30
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struct thunder_pem_pci {
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struct gen_pci gen_pci;
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u32 ea_entry[3];
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void __iomem *pem_reg_base;
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};
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static void __iomem *thunder_pem_map_bus(struct pci_bus *bus,
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unsigned int devfn, int where)
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{
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struct gen_pci *pci = bus->sysdata;
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resource_size_t idx = bus->number - pci->cfg.bus_range->start;
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return pci->cfg.win[idx] + ((devfn << 16) | where);
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}
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static int thunder_pem_bridge_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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u64 read_val;
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struct thunder_pem_pci *pem_pci;
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struct gen_pci *pci = bus->sysdata;
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pem_pci = container_of(pci, struct thunder_pem_pci, gen_pci);
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struct pci_config_window *cfg = bus->sysdata;
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struct thunder_pem_pci *pem_pci = (struct thunder_pem_pci *)cfg->priv;
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|
||||
if (devfn != 0 || where >= 2048) {
|
||||
*val = ~0;
|
||||
@ -132,17 +120,17 @@ static int thunder_pem_bridge_read(struct pci_bus *bus, unsigned int devfn,
|
||||
static int thunder_pem_config_read(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 *val)
|
||||
{
|
||||
struct gen_pci *pci = bus->sysdata;
|
||||
struct pci_config_window *cfg = bus->sysdata;
|
||||
|
||||
if (bus->number < pci->cfg.bus_range->start ||
|
||||
bus->number > pci->cfg.bus_range->end)
|
||||
if (bus->number < cfg->busr.start ||
|
||||
bus->number > cfg->busr.end)
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
|
||||
/*
|
||||
* The first device on the bus is the PEM PCIe bridge.
|
||||
* Special case its config access.
|
||||
*/
|
||||
if (bus->number == pci->cfg.bus_range->start)
|
||||
if (bus->number == cfg->busr.start)
|
||||
return thunder_pem_bridge_read(bus, devfn, where, size, val);
|
||||
|
||||
return pci_generic_config_read(bus, devfn, where, size, val);
|
||||
@ -187,12 +175,11 @@ static u32 thunder_pem_bridge_w1c_bits(int where)
|
||||
static int thunder_pem_bridge_write(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 val)
|
||||
{
|
||||
struct gen_pci *pci = bus->sysdata;
|
||||
struct thunder_pem_pci *pem_pci;
|
||||
struct pci_config_window *cfg = bus->sysdata;
|
||||
struct thunder_pem_pci *pem_pci = (struct thunder_pem_pci *)cfg->priv;
|
||||
u64 write_val, read_val;
|
||||
u32 mask = 0;
|
||||
|
||||
pem_pci = container_of(pci, struct thunder_pem_pci, gen_pci);
|
||||
|
||||
if (devfn != 0 || where >= 2048)
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
@ -256,53 +243,38 @@ static int thunder_pem_bridge_write(struct pci_bus *bus, unsigned int devfn,
|
||||
static int thunder_pem_config_write(struct pci_bus *bus, unsigned int devfn,
|
||||
int where, int size, u32 val)
|
||||
{
|
||||
struct gen_pci *pci = bus->sysdata;
|
||||
struct pci_config_window *cfg = bus->sysdata;
|
||||
|
||||
if (bus->number < pci->cfg.bus_range->start ||
|
||||
bus->number > pci->cfg.bus_range->end)
|
||||
if (bus->number < cfg->busr.start ||
|
||||
bus->number > cfg->busr.end)
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
/*
|
||||
* The first device on the bus is the PEM PCIe bridge.
|
||||
* Special case its config access.
|
||||
*/
|
||||
if (bus->number == pci->cfg.bus_range->start)
|
||||
if (bus->number == cfg->busr.start)
|
||||
return thunder_pem_bridge_write(bus, devfn, where, size, val);
|
||||
|
||||
|
||||
return pci_generic_config_write(bus, devfn, where, size, val);
|
||||
}
|
||||
|
||||
static struct gen_pci_cfg_bus_ops thunder_pem_bus_ops = {
|
||||
.bus_shift = 24,
|
||||
.ops = {
|
||||
.map_bus = thunder_pem_map_bus,
|
||||
.read = thunder_pem_config_read,
|
||||
.write = thunder_pem_config_write,
|
||||
}
|
||||
};
|
||||
|
||||
static const struct of_device_id thunder_pem_of_match[] = {
|
||||
{ .compatible = "cavium,pci-host-thunder-pem",
|
||||
.data = &thunder_pem_bus_ops },
|
||||
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, thunder_pem_of_match);
|
||||
|
||||
static int thunder_pem_probe(struct platform_device *pdev)
|
||||
static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
const struct of_device_id *of_id;
|
||||
resource_size_t bar4_start;
|
||||
struct resource *res_pem;
|
||||
struct thunder_pem_pci *pem_pci;
|
||||
struct platform_device *pdev;
|
||||
|
||||
/* Only OF support for now */
|
||||
if (!dev->of_node)
|
||||
return -EINVAL;
|
||||
|
||||
pem_pci = devm_kzalloc(dev, sizeof(*pem_pci), GFP_KERNEL);
|
||||
if (!pem_pci)
|
||||
return -ENOMEM;
|
||||
|
||||
of_id = of_match_node(thunder_pem_of_match, dev->of_node);
|
||||
pem_pci->gen_pci.cfg.ops = (struct gen_pci_cfg_bus_ops *)of_id->data;
|
||||
pdev = to_platform_device(dev);
|
||||
|
||||
/*
|
||||
* The second register range is the PEM bridge to the PCIe
|
||||
@ -330,7 +302,29 @@ static int thunder_pem_probe(struct platform_device *pdev)
|
||||
pem_pci->ea_entry[1] = (u32)(res_pem->end - bar4_start) & ~3u;
|
||||
pem_pci->ea_entry[2] = (u32)(bar4_start >> 32);
|
||||
|
||||
return pci_host_common_probe(pdev, &pem_pci->gen_pci);
|
||||
cfg->priv = pem_pci;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct pci_ecam_ops pci_thunder_pem_ops = {
|
||||
.bus_shift = 24,
|
||||
.init = thunder_pem_init,
|
||||
.pci_ops = {
|
||||
.map_bus = pci_ecam_map_bus,
|
||||
.read = thunder_pem_config_read,
|
||||
.write = thunder_pem_config_write,
|
||||
}
|
||||
};
|
||||
|
||||
static const struct of_device_id thunder_pem_of_match[] = {
|
||||
{ .compatible = "cavium,pci-host-thunder-pem" },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, thunder_pem_of_match);
|
||||
|
||||
static int thunder_pem_probe(struct platform_device *pdev)
|
||||
{
|
||||
return pci_host_common_probe(pdev, &pci_thunder_pem_ops);
|
||||
}
|
||||
|
||||
static struct platform_driver thunder_pem_driver = {
|
||||
|
Loading…
Reference in New Issue
Block a user