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ASoC: rockchip: Fix incorrect VDW value for 24 bit

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Correct valid data word register value for 24 bit data width. The
bit value should be 10 (aka 0x2), not 0x10.

This fixes playback of 24 bit audio.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sjoerd Simons 2015-11-25 09:54:11 +01:00 committed by Mark Brown
parent 0e18d457b3
commit 18a9d7486a
1 changed files with 3 additions and 3 deletions
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6
sound/soc/rockchip/rockchip_spdif.h
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@ -28,9 +28,9 @@
#define SPDIF_CFGR_VDW(x) (x << SPDIF_CFGR_VDW_SHIFT)
#define SDPIF_CFGR_VDW_MASK (0xf << SPDIF_CFGR_VDW_SHIFT)
#define SPDIF_CFGR_VDW_16 SPDIF_CFGR_VDW(0x00)
#define SPDIF_CFGR_VDW_20 SPDIF_CFGR_VDW(0x01)
#define SPDIF_CFGR_VDW_24 SPDIF_CFGR_VDW(0x10)
#define SPDIF_CFGR_VDW_16 SPDIF_CFGR_VDW(0x0)
#define SPDIF_CFGR_VDW_20 SPDIF_CFGR_VDW(0x1)
#define SPDIF_CFGR_VDW_24 SPDIF_CFGR_VDW(0x2)
/*
* DMACR