crypto: x86/chacha20 - Add a 4-block AVX-512VL variant
This version uses the same principle as the AVX2 version by scheduling the operations for two block pairs in parallel. It benefits from the AVX-512VL rotate instructions and the more efficient partial block handling using "vmovdqu8", resulting in a speedup of the raw block function of ~20%. Signed-off-by: Martin Willi <martin@strongswan.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Martin Willi
Herbert Xu
parent
29a47b54e0
commit
180def6c4a
arch/x86/crypto
@ -12,6 +12,11 @@
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CTR2BL: .octa 0x00000000000000000000000000000000
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.octa 0x00000000000000000000000000000001
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.section .rodata.cst32.CTR4BL, "aM", @progbits, 32
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.align 32
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CTR4BL: .octa 0x00000000000000000000000000000002
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.octa 0x00000000000000000000000000000003
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.section .rodata.cst32.CTR8BL, "aM", @progbits, 32
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.align 32
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CTR8BL: .octa 0x00000003000000020000000100000000
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@ -185,6 +190,273 @@ ENTRY(chacha20_2block_xor_avx512vl)
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ENDPROC(chacha20_2block_xor_avx512vl)
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ENTRY(chacha20_4block_xor_avx512vl)
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# %rdi: Input state matrix, s
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# %rsi: up to 4 data blocks output, o
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# %rdx: up to 4 data blocks input, i
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# %rcx: input/output length in bytes
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# This function encrypts four ChaCha20 block by loading the state
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# matrix four times across eight AVX registers. It performs matrix
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# operations on four words in two matrices in parallel, sequentially
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# to the operations on the four words of the other two matrices. The
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# required word shuffling has a rather high latency, we can do the
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# arithmetic on two matrix-pairs without much slowdown.
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vzeroupper
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# x0..3[0-4] = s0..3
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vbroadcasti128 0x00(%rdi),%ymm0
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vbroadcasti128 0x10(%rdi),%ymm1
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vbroadcasti128 0x20(%rdi),%ymm2
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vbroadcasti128 0x30(%rdi),%ymm3
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vmovdqa %ymm0,%ymm4
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vmovdqa %ymm1,%ymm5
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vmovdqa %ymm2,%ymm6
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vmovdqa %ymm3,%ymm7
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vpaddd CTR2BL(%rip),%ymm3,%ymm3
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vpaddd CTR4BL(%rip),%ymm7,%ymm7
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vmovdqa %ymm0,%ymm11
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vmovdqa %ymm1,%ymm12
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vmovdqa %ymm2,%ymm13
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vmovdqa %ymm3,%ymm14
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vmovdqa %ymm7,%ymm15
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mov $10,%rax
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.Ldoubleround4:
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# x0 += x1, x3 = rotl32(x3 ^ x0, 16)
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vpaddd %ymm1,%ymm0,%ymm0
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vpxord %ymm0,%ymm3,%ymm3
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vprold $16,%ymm3,%ymm3
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vpaddd %ymm5,%ymm4,%ymm4
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vpxord %ymm4,%ymm7,%ymm7
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vprold $16,%ymm7,%ymm7
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# x2 += x3, x1 = rotl32(x1 ^ x2, 12)
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vpaddd %ymm3,%ymm2,%ymm2
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vpxord %ymm2,%ymm1,%ymm1
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vprold $12,%ymm1,%ymm1
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vpaddd %ymm7,%ymm6,%ymm6
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vpxord %ymm6,%ymm5,%ymm5
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vprold $12,%ymm5,%ymm5
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# x0 += x1, x3 = rotl32(x3 ^ x0, 8)
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vpaddd %ymm1,%ymm0,%ymm0
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vpxord %ymm0,%ymm3,%ymm3
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vprold $8,%ymm3,%ymm3
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vpaddd %ymm5,%ymm4,%ymm4
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vpxord %ymm4,%ymm7,%ymm7
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vprold $8,%ymm7,%ymm7
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# x2 += x3, x1 = rotl32(x1 ^ x2, 7)
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vpaddd %ymm3,%ymm2,%ymm2
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vpxord %ymm2,%ymm1,%ymm1
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vprold $7,%ymm1,%ymm1
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vpaddd %ymm7,%ymm6,%ymm6
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vpxord %ymm6,%ymm5,%ymm5
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vprold $7,%ymm5,%ymm5
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# x1 = shuffle32(x1, MASK(0, 3, 2, 1))
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vpshufd $0x39,%ymm1,%ymm1
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vpshufd $0x39,%ymm5,%ymm5
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# x2 = shuffle32(x2, MASK(1, 0, 3, 2))
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vpshufd $0x4e,%ymm2,%ymm2
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vpshufd $0x4e,%ymm6,%ymm6
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# x3 = shuffle32(x3, MASK(2, 1, 0, 3))
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vpshufd $0x93,%ymm3,%ymm3
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vpshufd $0x93,%ymm7,%ymm7
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# x0 += x1, x3 = rotl32(x3 ^ x0, 16)
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vpaddd %ymm1,%ymm0,%ymm0
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vpxord %ymm0,%ymm3,%ymm3
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vprold $16,%ymm3,%ymm3
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vpaddd %ymm5,%ymm4,%ymm4
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vpxord %ymm4,%ymm7,%ymm7
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vprold $16,%ymm7,%ymm7
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# x2 += x3, x1 = rotl32(x1 ^ x2, 12)
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vpaddd %ymm3,%ymm2,%ymm2
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vpxord %ymm2,%ymm1,%ymm1
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vprold $12,%ymm1,%ymm1
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vpaddd %ymm7,%ymm6,%ymm6
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vpxord %ymm6,%ymm5,%ymm5
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vprold $12,%ymm5,%ymm5
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# x0 += x1, x3 = rotl32(x3 ^ x0, 8)
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vpaddd %ymm1,%ymm0,%ymm0
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vpxord %ymm0,%ymm3,%ymm3
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vprold $8,%ymm3,%ymm3
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vpaddd %ymm5,%ymm4,%ymm4
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vpxord %ymm4,%ymm7,%ymm7
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vprold $8,%ymm7,%ymm7
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# x2 += x3, x1 = rotl32(x1 ^ x2, 7)
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vpaddd %ymm3,%ymm2,%ymm2
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vpxord %ymm2,%ymm1,%ymm1
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vprold $7,%ymm1,%ymm1
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vpaddd %ymm7,%ymm6,%ymm6
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vpxord %ymm6,%ymm5,%ymm5
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vprold $7,%ymm5,%ymm5
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# x1 = shuffle32(x1, MASK(2, 1, 0, 3))
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vpshufd $0x93,%ymm1,%ymm1
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vpshufd $0x93,%ymm5,%ymm5
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# x2 = shuffle32(x2, MASK(1, 0, 3, 2))
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vpshufd $0x4e,%ymm2,%ymm2
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vpshufd $0x4e,%ymm6,%ymm6
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# x3 = shuffle32(x3, MASK(0, 3, 2, 1))
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vpshufd $0x39,%ymm3,%ymm3
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vpshufd $0x39,%ymm7,%ymm7
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dec %rax
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jnz .Ldoubleround4
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# o0 = i0 ^ (x0 + s0), first block
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vpaddd %ymm11,%ymm0,%ymm10
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cmp $0x10,%rcx
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jl .Lxorpart4
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vpxord 0x00(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x00(%rsi)
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vextracti128 $1,%ymm10,%xmm0
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# o1 = i1 ^ (x1 + s1), first block
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vpaddd %ymm12,%ymm1,%ymm10
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cmp $0x20,%rcx
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jl .Lxorpart4
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vpxord 0x10(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x10(%rsi)
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vextracti128 $1,%ymm10,%xmm1
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# o2 = i2 ^ (x2 + s2), first block
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vpaddd %ymm13,%ymm2,%ymm10
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cmp $0x30,%rcx
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jl .Lxorpart4
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vpxord 0x20(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x20(%rsi)
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vextracti128 $1,%ymm10,%xmm2
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# o3 = i3 ^ (x3 + s3), first block
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vpaddd %ymm14,%ymm3,%ymm10
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cmp $0x40,%rcx
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jl .Lxorpart4
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vpxord 0x30(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x30(%rsi)
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vextracti128 $1,%ymm10,%xmm3
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# xor and write second block
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vmovdqa %xmm0,%xmm10
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cmp $0x50,%rcx
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jl .Lxorpart4
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vpxord 0x40(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x40(%rsi)
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vmovdqa %xmm1,%xmm10
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cmp $0x60,%rcx
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jl .Lxorpart4
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vpxord 0x50(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x50(%rsi)
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vmovdqa %xmm2,%xmm10
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cmp $0x70,%rcx
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jl .Lxorpart4
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vpxord 0x60(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x60(%rsi)
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vmovdqa %xmm3,%xmm10
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cmp $0x80,%rcx
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jl .Lxorpart4
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vpxord 0x70(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x70(%rsi)
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# o0 = i0 ^ (x0 + s0), third block
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vpaddd %ymm11,%ymm4,%ymm10
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cmp $0x90,%rcx
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jl .Lxorpart4
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vpxord 0x80(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x80(%rsi)
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vextracti128 $1,%ymm10,%xmm4
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# o1 = i1 ^ (x1 + s1), third block
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vpaddd %ymm12,%ymm5,%ymm10
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cmp $0xa0,%rcx
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jl .Lxorpart4
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vpxord 0x90(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0x90(%rsi)
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vextracti128 $1,%ymm10,%xmm5
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# o2 = i2 ^ (x2 + s2), third block
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vpaddd %ymm13,%ymm6,%ymm10
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cmp $0xb0,%rcx
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jl .Lxorpart4
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vpxord 0xa0(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0xa0(%rsi)
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vextracti128 $1,%ymm10,%xmm6
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# o3 = i3 ^ (x3 + s3), third block
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vpaddd %ymm15,%ymm7,%ymm10
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cmp $0xc0,%rcx
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jl .Lxorpart4
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vpxord 0xb0(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0xb0(%rsi)
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vextracti128 $1,%ymm10,%xmm7
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# xor and write fourth block
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vmovdqa %xmm4,%xmm10
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cmp $0xd0,%rcx
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jl .Lxorpart4
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vpxord 0xc0(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0xc0(%rsi)
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vmovdqa %xmm5,%xmm10
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cmp $0xe0,%rcx
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jl .Lxorpart4
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vpxord 0xd0(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0xd0(%rsi)
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vmovdqa %xmm6,%xmm10
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cmp $0xf0,%rcx
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jl .Lxorpart4
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vpxord 0xe0(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0xe0(%rsi)
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vmovdqa %xmm7,%xmm10
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cmp $0x100,%rcx
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jl .Lxorpart4
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vpxord 0xf0(%rdx),%xmm10,%xmm9
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vmovdqu %xmm9,0xf0(%rsi)
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.Ldone4:
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vzeroupper
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ret
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.Lxorpart4:
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# xor remaining bytes from partial register into output
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mov %rcx,%rax
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and $0xf,%rcx
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jz .Ldone8
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mov %rax,%r9
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and $~0xf,%r9
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mov $1,%rax
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shld %cl,%rax,%rax
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sub $1,%rax
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kmovq %rax,%k1
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vmovdqu8 (%rdx,%r9),%xmm1{%k1}{z}
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vpxord %xmm10,%xmm1,%xmm1
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vmovdqu8 %xmm1,(%rsi,%r9){%k1}
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jmp .Ldone4
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ENDPROC(chacha20_4block_xor_avx512vl)
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ENTRY(chacha20_8block_xor_avx512vl)
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# %rdi: Input state matrix, s
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# %rsi: up to 8 data blocks output, o
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@ -34,6 +34,8 @@ static bool chacha20_use_avx2;
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#ifdef CONFIG_AS_AVX512
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asmlinkage void chacha20_2block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
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unsigned int len);
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asmlinkage void chacha20_4block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
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unsigned int len);
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asmlinkage void chacha20_8block_xor_avx512vl(u32 *state, u8 *dst, const u8 *src,
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unsigned int len);
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static bool chacha20_use_avx512vl;
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@ -64,6 +66,11 @@ static void chacha20_dosimd(u32 *state, u8 *dst, const u8 *src,
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state[12] += chacha20_advance(bytes, 8);
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return;
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}
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if (bytes > CHACHA_BLOCK_SIZE * 2) {
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chacha20_4block_xor_avx512vl(state, dst, src, bytes);
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state[12] += chacha20_advance(bytes, 4);
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return;
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}
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if (bytes) {
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chacha20_2block_xor_avx512vl(state, dst, src, bytes);
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state[12] += chacha20_advance(bytes, 2);
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