forked from Minki/linux
drm/komeda: Enable new product D32 support
D32 is simple version of D71, the difference is: - Only has one pipeline - Drop the periph block and merge it to GCU v2: Rebase. v3: Isolate the block counting fix to a new patch Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Reviewed-by: Mihail Atanassov <mihail.atanassov@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191210084828.19664-3-james.qian.wang@arm.com
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@ -18,7 +18,8 @@
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#define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 0xFF)
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/* Mali-display product IDs */
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#define MALIDP_D71_PRODUCT_ID 0x0071
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#define MALIDP_D71_PRODUCT_ID 0x0071
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#define MALIDP_D32_PRODUCT_ID 0x0032
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union komeda_config_id {
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struct {
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@ -1270,7 +1270,7 @@ static int d71_timing_ctrlr_init(struct d71_dev *d71,
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ctrlr = to_ctrlr(c);
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ctrlr->supports_dual_link = true;
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ctrlr->supports_dual_link = d71->supports_dual_link;
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return 0;
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}
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@ -371,23 +371,33 @@ static int d71_enum_resources(struct komeda_dev *mdev)
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goto err_cleanup;
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}
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/* probe PERIPH */
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/* Only the legacy HW has the periph block, the newer merges the periph
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* into GCU
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*/
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value = malidp_read32(d71->periph_addr, BLK_BLOCK_INFO);
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if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH) {
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DRM_ERROR("access blk periph but got blk: %d.\n",
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BLOCK_INFO_BLK_TYPE(value));
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err = -EINVAL;
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goto err_cleanup;
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if (BLOCK_INFO_BLK_TYPE(value) != D71_BLK_TYPE_PERIPH)
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d71->periph_addr = NULL;
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if (d71->periph_addr) {
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/* probe PERIPHERAL in legacy HW */
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value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID);
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d71->max_line_size = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048;
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d71->max_vsize = 4096;
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d71->num_rich_layers = value & PERIPH_NUM_RICH_LAYERS ? 2 : 1;
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d71->supports_dual_link = !!(value & PERIPH_SPLIT_EN);
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d71->integrates_tbu = !!(value & PERIPH_TBU_EN);
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} else {
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value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID0);
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d71->max_line_size = GCU_MAX_LINE_SIZE(value);
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d71->max_vsize = GCU_MAX_NUM_LINES(value);
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value = malidp_read32(d71->gcu_addr, GCU_CONFIGURATION_ID1);
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d71->num_rich_layers = GCU_NUM_RICH_LAYERS(value);
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d71->supports_dual_link = GCU_DISPLAY_SPLIT_EN(value);
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d71->integrates_tbu = GCU_DISPLAY_TBU_EN(value);
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}
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value = malidp_read32(d71->periph_addr, PERIPH_CONFIGURATION_ID);
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d71->max_line_size = value & PERIPH_MAX_LINE_SIZE ? 4096 : 2048;
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d71->max_vsize = 4096;
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d71->num_rich_layers = value & PERIPH_NUM_RICH_LAYERS ? 2 : 1;
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d71->supports_dual_link = value & PERIPH_SPLIT_EN ? true : false;
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d71->integrates_tbu = value & PERIPH_TBU_EN ? true : false;
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for (i = 0; i < d71->num_pipelines; i++) {
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pipe = komeda_pipeline_add(mdev, sizeof(struct d71_pipeline),
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&d71_pipeline_funcs);
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@ -606,6 +616,7 @@ d71_identify(u32 __iomem *reg_base, struct komeda_chip_info *chip)
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switch (product_id) {
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case MALIDP_D71_PRODUCT_ID:
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case MALIDP_D32_PRODUCT_ID:
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funcs = &d71_chip_funcs;
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break;
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default:
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@ -72,6 +72,19 @@
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#define GCU_CONTROL_MODE(x) ((x) & 0x7)
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#define GCU_CONTROL_SRST BIT(16)
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/* GCU_CONFIGURATION registers */
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#define GCU_CONFIGURATION_ID0 0x100
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#define GCU_CONFIGURATION_ID1 0x104
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/* GCU configuration */
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#define GCU_MAX_LINE_SIZE(x) ((x) & 0xFFFF)
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#define GCU_MAX_NUM_LINES(x) ((x) >> 16)
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#define GCU_NUM_RICH_LAYERS(x) ((x) & 0x7)
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#define GCU_NUM_PIPELINES(x) (((x) >> 3) & 0x7)
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#define GCU_NUM_SCALERS(x) (((x) >> 6) & 0x7)
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#define GCU_DISPLAY_SPLIT_EN(x) (((x) >> 16) & 0x1)
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#define GCU_DISPLAY_TBU_EN(x) (((x) >> 17) & 0x1)
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/* GCU opmode */
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#define INACTIVE_MODE 0
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#define TBU_CONNECT_MODE 1
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@ -125,6 +125,7 @@ static int komeda_platform_remove(struct platform_device *pdev)
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static const struct of_device_id komeda_of_match[] = {
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{ .compatible = "arm,mali-d71", .data = d71_identify, },
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{ .compatible = "arm,mali-d32", .data = d71_identify, },
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{},
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};
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