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Merge master.kernel.org:/home/rmk/linux-2.6-serial

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This commit is contained in:
Linus Torvalds 2006-02-08 15:21:22 -08:00
commit 17be03f0a1
49 changed files with 108 additions and 113 deletions
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1
arch/arm/mach-imx/mx1ads.c
View File

@ -27,7 +27,6 @@
#include <asm/mach/arch.h>
#include <linux/interrupt.h>
#include "generic.h"
#include <asm/serial.h>
static struct resource cs89x0_resources[] = {
[0] = {

2
arch/mips/cobalt/setup.c
View File

@ -140,7 +140,7 @@ void __init plat_setup(void)
uart.type = PORT_UNKNOWN;
uart.uartclk = 18432000;
uart.irq = COBALT_SERIAL_IRQ;
uart.flags = STD_COM_FLAGS;
uart.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
uart.iobase = 0xc800000;
uart.iotype = UPIO_PORT;

4
arch/mips/lasat/setup.c
View File

@ -134,8 +134,8 @@ void __init serial_init(void)
memset(&s, 0, sizeof(s));
s.flags = STD_COM_FLAGS;
s.iotype = SERIAL_IO_MEM;
s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
s.iotype = UPIO_MEM;
if (mips_machtype == MACH_LASAT_100) {
s.uartclk = LASAT_BASE_BAUD_100 * 16;

4
arch/mips/mips-boards/atlas/atlas_setup.c
View File

@ -82,8 +82,8 @@ static void __init serial_init(void)
#endif
s.irq = ATLASINT_UART;
s.uartclk = ATLAS_BASE_BAUD * 16;
s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
s.iotype = SERIAL_IO_PORT;
s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
s.iotype = UPIO_PORT;
s.regshift = 3;
if (early_serial_setup(&s) != 0) {

4
arch/mips/mips-boards/sead/sead_setup.c
View File

@ -71,8 +71,8 @@ static void __init serial_init(void)
#endif
s.irq = MIPSCPU_INT_BASE + MIPSCPU_INT_UART0;
s.uartclk = SEAD_BASE_BAUD * 16;
s.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
s.iotype = 0;
s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
s.iotype = UPIO_PORT;
s.regshift = 3;
if (early_serial_setup(&s) != 0) {

4
arch/mips/mips-boards/sim/sim_setup.c
View File

@ -88,8 +88,8 @@ static void __init serial_init(void)
but poll for now */
s.irq = 0;
s.uartclk = BASE_BAUD * 16;
s.flags = ASYNC_BOOT_AUTOCONF | UPF_SKIP_TEST;
s.iotype = SERIAL_IO_PORT | ASYNC_SKIP_TEST;
s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
s.iotype = UPIO_PORT;
s.regshift = 0;
s.timeout = 4;

2
arch/mips/momentum/jaguar_atx/ja-console.c
View File

@ -93,7 +93,7 @@ static void inline ja_console_probe(void)
up.uartclk = JAGUAR_ATX_UART_CLK;
up.regshift = 2;
up.iotype = UPIO_MEM;
up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
up.line = 0;
if (early_serial_setup(&up))

8
arch/mips/philips/pnx8550/common/platform.c
View File

@ -66,28 +66,28 @@ struct ip3106_port ip3106_ports[] = {
[0] = {
.port = {
.type = PORT_IP3106,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void __iomem *)PNX8550_UART_PORT0,
.mapbase = PNX8550_UART_PORT0,
.irq = PNX8550_UART_INT(0),
.uartclk = 3692300,
.fifosize = 16,
.ops = &ip3106_pops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
},
[1] = {
.port = {
.type = PORT_IP3106,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void __iomem *)PNX8550_UART_PORT1,
.mapbase = PNX8550_UART_PORT1,
.irq = PNX8550_UART_INT(1),
.uartclk = 3692300,
.fifosize = 16,
.ops = &ip3106_pops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
},

2
arch/mips/pmc-sierra/yosemite/setup.c
View File

@ -185,7 +185,7 @@ static void __init py_uart_setup(void)
up.uartclk = TITAN_UART_CLK;
up.regshift = 0;
up.iotype = UPIO_MEM;
up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
up.line = 0;
if (early_serial_setup(&up))

13
arch/mips/sgi-ip32/ip32-setup.c
View File

@ -66,11 +66,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
extern int early_serial_setup(struct uart_port *port);
#define STD_COM_FLAGS (ASYNC_SKIP_TEST)
#define BASE_BAUD (1843200 / 16)
#endif /* CONFIG_SERIAL_8250 */
/* An arbitrary time; this can be decreased if reliability looks good */
@ -110,8 +105,8 @@ void __init plat_setup(void)
o2_serial[0].type = PORT_16550A;
o2_serial[0].line = 0;
o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
o2_serial[0].flags = STD_COM_FLAGS;
o2_serial[0].uartclk = BASE_BAUD * 16;
o2_serial[0].flags = UPF_SKIP_TEST;
o2_serial[0].uartclk = 1843200;
o2_serial[0].iotype = UPIO_MEM;
o2_serial[0].membase = (char *)&mace->isa.serial1;
o2_serial[0].fifosize = 14;
@ -121,8 +116,8 @@ void __init plat_setup(void)
o2_serial[1].type = PORT_16550A;
o2_serial[1].line = 1;
o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
o2_serial[1].flags = STD_COM_FLAGS;
o2_serial[1].uartclk = BASE_BAUD * 16;
o2_serial[1].flags = UPF_SKIP_TEST;
o2_serial[1].uartclk = 1843200;
o2_serial[1].iotype = UPIO_MEM;
o2_serial[1].membase = (char *)&mace->isa.serial2;
o2_serial[1].fifosize = 14;

4
arch/ppc/platforms/4xx/bamboo.c
View File

@ -332,8 +332,8 @@ bamboo_early_serial_map(void)
port.irq = 0;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0;
if (early_serial_setup(&port) != 0) {

4
arch/ppc/platforms/4xx/bubinga.c
View File

@ -97,8 +97,8 @@ bubinga_early_serial_map(void)
port.irq = ACTING_UART0_INT;
port.uartclk = uart_clock;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0;
if (early_serial_setup(&port) != 0) {

4
arch/ppc/platforms/4xx/ebony.c
View File

@ -225,8 +225,8 @@ ebony_early_serial_map(void)
port.irq = 0;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0;
if (early_serial_setup(&port) != 0) {

4
arch/ppc/platforms/4xx/luan.c
View File

@ -279,8 +279,8 @@ luan_early_serial_map(void)
port.irq = UART0_INT;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0;
if (early_serial_setup(&port) != 0) {

4
arch/ppc/platforms/4xx/ocotea.c
View File

@ -248,8 +248,8 @@ ocotea_early_serial_map(void)
port.irq = UART0_INT;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0;
if (early_serial_setup(&port) != 0) {

4
arch/ppc/platforms/4xx/xilinx_ml300.c
View File

@ -95,8 +95,8 @@ ml300_early_serial_map(void)
port.irq = old_ports[i].irq;
port.uartclk = old_ports[i].baud_base * 16;
port.regshift = old_ports[i].iomem_reg_shift;
port.iotype = SERIAL_IO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = i;
if (early_serial_setup(&port) != 0) {

4
arch/ppc/platforms/4xx/yucca.c
View File

@ -305,8 +305,8 @@ yucca_early_serial_map(void)
port.irq = UART0_INT;
port.uartclk = clocks.uart0;
port.regshift = 0;
port.iotype = SERIAL_IO_MEM;
port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
port.iotype = UPIO_MEM;
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
port.line = 0;
if (early_serial_setup(&port) != 0) {

4
arch/ppc/platforms/83xx/mpc834x_sys.c
View File

@ -301,14 +301,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
struct uart_port p;
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
p.uartclk = binfo->bi_busfreq;

4
arch/ppc/platforms/85xx/mpc8540_ads.c
View File

@ -162,14 +162,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
p.uartclk = binfo->bi_busfreq;

4
arch/ppc/platforms/85xx/mpc85xx_cds_common.c
View File

@ -534,14 +534,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
p.uartclk = binfo->bi_busfreq;

2
arch/ppc/platforms/85xx/sbc8560.c
View File

@ -64,7 +64,7 @@ sbc8560_early_serial_map(void)
uart_req.irq = MPC85xx_IRQ_EXT9;
uart_req.flags = STD_COM_FLAGS;
uart_req.uartclk = BASE_BAUD * 16;
uart_req.iotype = SERIAL_IO_MEM;
uart_req.iotype = UPIO_MEM;
uart_req.mapbase = UARTA_ADDR;
uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART0_SIZE);
uart_req.type = PORT_16650;

4
arch/ppc/platforms/85xx/tqm85xx.c
View File

@ -346,14 +346,14 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
p.uartclk = binfo->bi_busfreq;
gen550_init(0, &p);
memset(&p, 0, sizeof (p));
p.iotype = SERIAL_IO_MEM;
p.iotype = UPIO_MEM;
p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
p.uartclk = binfo->bi_busfreq;

2
arch/ppc/platforms/chestnut.c
View File

@ -116,7 +116,7 @@ chestnut_early_serial_map(void)
port.uartclk = BASE_BAUD * 16;
port.irq = UART0_INT;
port.flags = STD_COM_FLAGS | UPF_IOREMAP;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.mapbase = CHESTNUT_UART0_IO_BASE;
port.regshift = 0;

2
arch/ppc/platforms/ev64260.c
View File

@ -330,7 +330,7 @@ ev64260_early_serial_map(void)
port.irq = EV64260_UART_0_IRQ;
port.uartclk = BASE_BAUD * 16;
port.regshift = 2;
port.iotype = SERIAL_IO_MEM;
port.iotype = UPIO_MEM;
port.flags = STD_COM_FLAGS;
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)

2
arch/ppc/platforms/radstone_ppc7d.c
View File

@ -100,7 +100,7 @@ static void __init ppc7d_early_serial_map(void)
serial_req.uartclk = UART_CLK;
serial_req.irq = 4;
serial_req.flags = STD_COM_FLAGS;
serial_req.iotype = SERIAL_IO_MEM;
serial_req.iotype = UPIO_MEM;
serial_req.membase = (u_char *) PPC7D_SERIAL_0;
gen550_init(0, &serial_req);

4
arch/ppc/platforms/spruce.c
View File

@ -176,8 +176,8 @@ spruce_early_serial_map(void)
memset(&serial_req, 0, sizeof(serial_req));
serial_req.uartclk = uart_clk;
serial_req.irq = UART0_INT;
serial_req.flags = ASYNC_BOOT_AUTOCONF;
serial_req.iotype = SERIAL_IO_MEM;
serial_req.flags = UPF_BOOT_AUTOCONF;
serial_req.iotype = UPIO_MEM;
serial_req.membase = (u_char *)UART0_IO_BASE;
serial_req.regshift = 0;

2
arch/ppc/syslib/ppc83xx_setup.c
View File

@ -108,7 +108,7 @@ mpc83xx_early_serial_map(void)
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
memset(&serial_req, 0, sizeof (serial_req));
serial_req.iotype = SERIAL_IO_MEM;
serial_req.iotype = UPIO_MEM;
serial_req.mapbase = pdata[0].mapbase;
serial_req.membase = pdata[0].membase;
serial_req.regshift = 0;

2
arch/ppc/syslib/ppc85xx_setup.c
View File

@ -90,7 +90,7 @@ mpc85xx_early_serial_map(void)
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
memset(&serial_req, 0, sizeof (serial_req));
serial_req.iotype = SERIAL_IO_MEM;
serial_req.iotype = UPIO_MEM;
serial_req.mapbase = pdata[0].mapbase;
serial_req.membase = pdata[0].membase;
serial_req.regshift = 0;

2
drivers/serial/21285.c
View File

@ -362,7 +362,7 @@ static struct uart_ops serial21285_ops = {
static struct uart_port serial21285_port = {
.mapbase = 0x42000160,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = NO_IRQ,
.fifosize = 16,
.ops = &serial21285_ops,

1
drivers/serial/8250.c
View File

@ -2229,6 +2229,7 @@ serial8250_console_write(struct console *co, const char *s, unsigned int count)
* and restore the IER
*/
wait_for_xmitr(up, BOTH_EMPTY);
up->ier |= UART_IER_THRI;
serial_out(up, UART_IER, ier | UART_IER_THRI);
}

1
drivers/serial/8250_au1x00.c
View File

@ -56,7 +56,6 @@ static struct plat_serial8250_port au1x00_data[] = {
#elif defined(CONFIG_SOC_AU1550)
PORT(UART0_ADDR, AU1550_UART0_INT),
PORT(UART1_ADDR, AU1550_UART1_INT),
PORT(UART2_ADDR, AU1550_UART2_INT),
PORT(UART3_ADDR, AU1550_UART3_INT),
#elif defined(CONFIG_SOC_AU1200)
PORT(UART0_ADDR, AU1200_UART0_INT),

4
drivers/serial/8250_pci.c
View File

@ -1882,6 +1882,10 @@ static struct pci_device_id serial_pci_tbl[] = {
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_TITAN_4, 0, 0,
pbn_b0_4_1843200 },
{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
PCI_VENDOR_ID_AFAVLAB,
PCI_SUBDEVICE_ID_AFAVLAB_P061, 0, 0,
pbn_b0_4_1152000 },
{ PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
PCI_SUBVENDOR_ID_CONNECT_TECH,
PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_2_232, 0, 0,

4
drivers/serial/amba-pl010.c
View File

@ -561,7 +561,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
.mapbase = INTEGRATOR_UART0_BASE,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT0,
.uartclk = 14745600,
.fifosize = 16,
@ -576,7 +576,7 @@ static struct uart_amba_port amba_ports[UART_NR] = {
.port = {
.membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
.mapbase = INTEGRATOR_UART1_BASE,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UARTINT1,
.uartclk = 14745600,
.fifosize = 16,

12
drivers/serial/au1x00_uart.c
View File

@ -892,7 +892,7 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
int ret = 0;
switch (up->port.iotype) {
case SERIAL_IO_MEM:
case UPIO_MEM:
if (up->port.mapbase) {
*res = request_mem_region(up->port.mapbase, size, "serial");
if (!*res)
@ -900,8 +900,8 @@ serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res
}
break;
case SERIAL_IO_HUB6:
case SERIAL_IO_PORT:
case UPIO_HUB6:
case UPIO_PORT:
*res = request_region(up->port.iobase, size, "serial");
if (!*res)
ret = -EBUSY;
@ -919,7 +919,7 @@ static void serial8250_release_port(struct uart_port *port)
size <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_MEM:
case UPIO_MEM:
if (up->port.mapbase) {
/*
* Unmap the area.
@ -935,8 +935,8 @@ static void serial8250_release_port(struct uart_port *port)
}
break;
case SERIAL_IO_HUB6:
case SERIAL_IO_PORT:
case UPIO_HUB6:
case UPIO_PORT:
start = up->port.iobase;
if (size)

25
drivers/serial/cpm_uart/cpm_uart_core.c
View File

@ -252,12 +252,9 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
/* If we have not enough room in tty flip buffer, then we try
* later, which will be the next rx-interrupt or a timeout
*/
if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) {
tty->flip.work.func((void *)tty);
if ((tty->flip.count + i) >= TTY_FLIPBUF_SIZE) {
printk(KERN_WARNING "TTY_DONT_FLIP set\n");
return;
}
if(tty_buffer_request_room(tty, i) < i) {
printk(KERN_WARNING "No room in flip buffer\n");
return;
}
/* get pointer */
@ -276,9 +273,7 @@ static void cpm_uart_int_rx(struct uart_port *port, struct pt_regs *regs)
continue;
error_return:
*tty->flip.char_buf_ptr++ = ch;
*tty->flip.flag_buf_ptr++ = flg;
tty->flip.count++;
tty_insert_flip_char(tty, ch, flg);
} /* End while (i--) */
@ -908,7 +903,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SMC1_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.flags = FLAG_SMC,
@ -922,7 +917,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SMC2_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.flags = FLAG_SMC,
@ -939,7 +934,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC1_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -953,7 +948,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC2_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -967,7 +962,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC3_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,
@ -981,7 +976,7 @@ struct uart_cpm_port cpm_uart_ports[UART_NR] = {
.port = {
.irq = SCC4_IRQ,
.ops = &cpm_uart_pops,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.lock = SPIN_LOCK_UNLOCKED,
},
.tx_nrfifos = TX_NUM_FIFO,

3
drivers/serial/dz.c
View File

@ -262,6 +262,7 @@ static inline void dz_receive_chars(struct dz_port *dport)
}
tty_insert_flip_char(tty, ch, flag);
ignore_char:
;
} while (status & DZ_DVAL);
if (tty)
@ -650,7 +651,7 @@ static void __init dz_init_ports(void)
for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
spin_lock_init(&dport->port.lock);
dport->port.membase = (char *) base;
dport->port.iotype = SERIAL_IO_PORT;
dport->port.iotype = UPIO_PORT;
dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
dport->port.line = i;
dport->port.fifosize = 1;

4
drivers/serial/imx.c
View File

@ -668,7 +668,7 @@ static struct imx_port imx_ports[] = {
.rtsirq = UART1_MINT_RTS,
.port = {
.type = PORT_IMX,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void *)IMX_UART1_BASE,
.mapbase = IMX_UART1_BASE, /* FIXME */
.irq = UART1_MINT_RX,
@ -684,7 +684,7 @@ static struct imx_port imx_ports[] = {
.rtsirq = UART2_MINT_RTS,
.port = {
.type = PORT_IMX,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.membase = (void *)IMX_UART2_BASE,
.mapbase = IMX_UART2_BASE, /* FIXME */
.irq = UART2_MINT_RX,

8
drivers/serial/ip22zilog.c
View File

@ -215,7 +215,7 @@ static void __load_zsregs(struct zilog_channel *channel, unsigned char *regs)
/* Lower and upper byte of baud rate generator divisor. */
write_zsreg(channel, R12, regs[R12]);
write_zsreg(channel, R13, regs[R13]);
/* Now rewrite R14, with BRENAB (if set). */
write_zsreg(channel, R14, regs[R14]);
@ -571,7 +571,7 @@ static void ip22zilog_set_mctrl(struct uart_port *port, unsigned int mctrl)
else
clear_bits |= DTR;
/* NOTE: Not subject to 'transmitter active' rule. */
/* NOTE: Not subject to 'transmitter active' rule. */
up->curregs[R5] |= set_bits;
up->curregs[R5] &= ~clear_bits;
write_zsreg(channel, R5, up->curregs[R5]);
@ -654,7 +654,7 @@ static void ip22zilog_enable_ms(struct uart_port *port)
if (new_reg != up->curregs[R15]) {
up->curregs[R15] = new_reg;
/* NOTE: Not subject to 'transmitter active' rule. */
/* NOTE: Not subject to 'transmitter active' rule. */
write_zsreg(channel, R15, up->curregs[R15]);
}
}
@ -680,7 +680,7 @@ static void ip22zilog_break_ctl(struct uart_port *port, int break_state)
if (new_reg != up->curregs[R5]) {
up->curregs[R5] = new_reg;
/* NOTE: Not subject to 'transmitter active' rule. */
/* NOTE: Not subject to 'transmitter active' rule. */
write_zsreg(channel, R5, up->curregs[R5]);
}

2
drivers/serial/m32r_sio.c
View File

@ -80,7 +80,7 @@
#include <asm/serial.h>
/* Standard COM flags */
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
/*
* SERIAL_PORT_DFNS tells us about built-in ports that have no

2
drivers/serial/mux.c
View File

@ -462,7 +462,7 @@ static int __init mux_probe(struct parisc_device *dev)
port->mapbase = dev->hpa.start + MUX_OFFSET +
(i * MUX_LINE_OFFSET);
port->membase = ioremap(port->mapbase, MUX_LINE_OFFSET);
port->iotype = SERIAL_IO_MEM;
port->iotype = UPIO_MEM;
port->type = PORT_MUX;
port->irq = NO_IRQ;
port->uartclk = 0;

2
drivers/serial/pmac_zilog.c
View File

@ -1492,7 +1492,7 @@ no_dma:
/*
* Init remaining bits of "port" structure
*/
uap->port.iotype = SERIAL_IO_MEM;
uap->port.iotype = UPIO_MEM;
uap->port.irq = np->intrs[0].line;
uap->port.uartclk = ZS_CLOCK;
uap->port.fifosize = 1;

2
drivers/serial/sa1100.c
View File

@ -628,7 +628,7 @@ static void __init sa1100_init_ports(void)
sa1100_ports[i].port.ops = &sa1100_pops;
sa1100_ports[i].port.fifosize = 8;
sa1100_ports[i].port.line = i;
sa1100_ports[i].port.iotype = SERIAL_IO_MEM;
sa1100_ports[i].port.iotype = UPIO_MEM;
init_timer(&sa1100_ports[i].timer);
sa1100_ports[i].timer.function = sa1100_timeout;
sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];

6
drivers/serial/serial_lh7a40x.c
View File

@ -501,7 +501,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART1_PHYS),
.mapbase = UART1_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART1INTR,
.uartclk = 14745600/2,
.fifosize = 16,
@ -514,7 +514,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART2_PHYS),
.mapbase = UART2_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART2INTR,
.uartclk = 14745600/2,
.fifosize = 16,
@ -527,7 +527,7 @@ static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
.port = {
.membase = (void*) io_p2v (UART3_PHYS),
.mapbase = UART3_PHYS,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = IRQ_UART3INTR,
.uartclk = 14745600/2,
.fifosize = 16,

20
drivers/serial/sh-sci.c
View File

@ -1468,10 +1468,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff923000,
.mapbase = 0xff923000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 61,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
@ -1482,10 +1482,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff924000,
.mapbase = 0xff924000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 62,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,
@ -1496,10 +1496,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xff925000,
.mapbase = 0xff925000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 63,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 2,
},
.type = PORT_SCIF,
@ -1511,10 +1511,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xffe00000,
.mapbase = 0xffe00000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 43,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 0,
},
.type = PORT_SCIF,
@ -1525,10 +1525,10 @@ static struct sci_port sci_ports[] = {
.port = {
.membase = (void *)0xffe10000,
.mapbase = 0xffe10000,
.iotype = SERIAL_IO_MEM,
.iotype = UPIO_MEM,
.irq = 79,
.ops = &sci_uart_ops,
.flags = ASYNC_BOOT_AUTOCONF,
.flags = UPF_BOOT_AUTOCONF,
.line = 1,
},
.type = PORT_SCIF,

2
drivers/serial/sunsab.c
View File

@ -1036,7 +1036,7 @@ static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg
up->port.irq = edev->irqs[0];
up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
up->port.mapbase = (unsigned long)up->regs;
up->port.iotype = SERIAL_IO_MEM;
up->port.iotype = UPIO_MEM;
writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);

10
drivers/serial/sunsu.c
View File

@ -109,11 +109,11 @@ static _INLINE_ unsigned int serial_in(struct uart_sunsu_port *up, int offset)
offset <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_HUB6:
case UPIO_HUB6:
outb(up->port.hub6 - 1 + offset, up->port.iobase);
return inb(up->port.iobase + 1);
case SERIAL_IO_MEM:
case UPIO_MEM:
return readb(up->port.membase + offset);
default:
@ -139,12 +139,12 @@ serial_out(struct uart_sunsu_port *up, int offset, int value)
offset <<= up->port.regshift;
switch (up->port.iotype) {
case SERIAL_IO_HUB6:
case UPIO_HUB6:
outb(up->port.hub6 - 1 + offset, up->port.iobase);
outb(value, up->port.iobase + 1);
break;
case SERIAL_IO_MEM:
case UPIO_MEM:
writeb(value, up->port.membase + offset);
break;
@ -1052,7 +1052,7 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
return;
up->type_probed = PORT_UNKNOWN;
up->port.iotype = SERIAL_IO_MEM;
up->port.iotype = UPIO_MEM;
/*
* First we look for Ebus-bases su's

4
drivers/serial/sunzilog.c
View File

@ -1487,7 +1487,7 @@ static void __init sunzilog_prepare(void)
up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB;
/* Channel A */
up[(chip * 2) + 0].port.iotype = SERIAL_IO_MEM;
up[(chip * 2) + 0].port.iotype = UPIO_MEM;
up[(chip * 2) + 0].port.irq = zilog_irq;
up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
up[(chip * 2) + 0].port.fifosize = 1;
@ -1498,7 +1498,7 @@ static void __init sunzilog_prepare(void)
up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
/* Channel B */
up[(chip * 2) + 1].port.iotype = SERIAL_IO_MEM;
up[(chip * 2) + 1].port.iotype = UPIO_MEM;
up[(chip * 2) + 1].port.irq = zilog_irq;
up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
up[(chip * 2) + 1].port.fifosize = 1;

2
drivers/serial/v850e_uart.c
View File

@ -496,7 +496,7 @@ static int __init v850e_uart_init (void)
port->ops = &v850e_uart_ops;
port->line = chan;
port->iotype = SERIAL_IO_MEM;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF;
/* We actually use multiple IRQs, but the serial

1
include/linux/pci_ids.h
View File

@ -1832,6 +1832,7 @@
#define PCI_VENDOR_ID_AFAVLAB 0x14db
#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180
#define PCI_DEVICE_ID_AFAVLAB_P030 0x2182
#define PCI_SUBDEVICE_ID_AFAVLAB_P061 0x2150
#define PCI_VENDOR_ID_BROADCOM 0x14e4
#define PCI_DEVICE_ID_TIGON3_5752 0x1600