drm/amdkfd: enable heavy-weight TLB flush on Vega20
It is to meet the requirement for memory allocation optimization on MI50. Signed-off-by: Eric Huang <jinhuieric.huang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1419,7 +1419,8 @@ err_unlock:
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static bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev) {
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return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) ||
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(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) &&
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dev->adev->sdma.instance[0].fw_version >= 18);
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dev->adev->sdma.instance[0].fw_version >= 18) ||
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KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);
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}
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static int kfd_ioctl_map_memory_to_gpu(struct file *filep,
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