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[ARM] 4197/1: S3C2443: IRQ number updates

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Update IRQ numbers for S3C2443

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Ben Dooks 2007-02-15 16:35:51 +01:00 committed by Russell King
parent e9316f9be6
commit 17908ed715
1 changed files with 37 additions and 6 deletions
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43
include/asm-arm/arch-s3c2410/irqs.h
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@ -34,10 +34,10 @@
#define IRQ_EINT4t7 S3C2410_IRQ(4) /* 20 */
#define IRQ_EINT8t23 S3C2410_IRQ(5)
#define IRQ_RESERVED6 S3C2410_IRQ(6) /* for s3c2410 */
#define IRQ_CAM S3C2410_IRQ(6) /* for s3c2440 */
#define IRQ_CAM S3C2410_IRQ(6) /* for s3c2440,s3c2443 */
#define IRQ_BATT_FLT S3C2410_IRQ(7)
#define IRQ_TICK S3C2410_IRQ(8) /* 24 */
#define IRQ_WDT S3C2410_IRQ(9)
#define IRQ_WDT S3C2410_IRQ(9) /* WDT/AC97 for s3c2443 */
#define IRQ_TIMER0 S3C2410_IRQ(10)
#define IRQ_TIMER1 S3C2410_IRQ(11)
#define IRQ_TIMER2 S3C2410_IRQ(12)
@ -45,7 +45,7 @@
#define IRQ_TIMER4 S3C2410_IRQ(14)
#define IRQ_UART2 S3C2410_IRQ(15)
#define IRQ_LCD S3C2410_IRQ(16) /* 32 */
#define IRQ_DMA0 S3C2410_IRQ(17)
#define IRQ_DMA0 S3C2410_IRQ(17) /* IRQ_DMA for s3c2443 */
#define IRQ_DMA1 S3C2410_IRQ(18)
#define IRQ_DMA2 S3C2410_IRQ(19)
#define IRQ_DMA3 S3C2410_IRQ(20)
@ -114,12 +114,43 @@
/* extra irqs for s3c2440 */
#define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11)
#define IRQ_S3C2440_CAM_P S3C2410_IRQSUB(12)
#define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */
#define IRQ_S3C2440_CAM_P S3C2410_IRQSUB(12) /* S3C2443 too */
#define IRQ_S3C2440_WDT S3C2410_IRQSUB(13)
#define IRQ_S3C2440_AC97 S3C2410_IRQSUB(14)
#define NR_IRQS (IRQ_S3C2440_AC97+1)
/* irqs for s3c2443 */
#define IRQ_S3C2443_DMA S3C2410_IRQ(17) /* IRQ_DMA1 */
#define IRQ_S3C2443_UART3 S3C2410_IRQ(18) /* IRQ_DMA2 */
#define IRQ_S3C2443_CFCON S3C2410_IRQ(19) /* IRQ_DMA3 */
#define IRQ_S3C2443_SDI1 S3C2410_IRQ(20) /* IRQ_SDI */
#define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */
#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14)
#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15)
#define IRQ_S3C2443_LCD3 S3C2410_IRQSUB(16)
#define IRQ_S3C2443_LCD4 S3C2410_IRQSUB(17)
#define IRQ_S3C2443_DMA0 S3C2410_IRQSUB(18)
#define IRQ_S3C2443_DMA1 S3C2410_IRQSUB(19)
#define IRQ_S3C2443_DMA2 S3C2410_IRQSUB(20)
#define IRQ_S3C2443_DMA3 S3C2410_IRQSUB(21)
#define IRQ_S3C2443_DMA4 S3C2410_IRQSUB(22)
#define IRQ_S3C2443_DMA5 S3C2410_IRQSUB(23)
/* UART3 */
#define IRQ_S3C2443_RX3 S3C2410_IRQSUB(24)
#define IRQ_S3C2443_TX3 S3C2410_IRQSUB(25)
#define IRQ_S3C2443_ERR3 S3C2410_IRQSUB(26)
#define IRQ_S3C2443_WDT S3C2410_IRQSUB(27)
#define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28)
#ifdef CONFIG_CPU_S3C2443
#define NR_IRQS (IRQ_S3C2443_AC97+1)
#else
#define NR_IRQS (IRQ_S3C2440_AC97+1)
#endif
#endif /* __ASM_ARCH_IRQ_H */