ipw2200, fix ipw io functions
- some of them are defined as follows: #define ipw_write32 expr1; expr2 and are called from loops or ifs without a compound statement, so they are broken. Fix it by putting them into do {} while (0) for writes and ({ }) for reads. - also unify and cleanup them while at it -- convert them from macros to inline functions, so that we get some basic typechecking Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Acked-by: Zhu Yi <yi.zhu@intel.com> Cc: James Ketrenos <jketreno@linux.intel.com> Cc: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -301,88 +301,102 @@ static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
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}
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/* 8-bit direct write (low 4K) */
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#define _ipw_write8(ipw, ofs, val) writeb((val), (ipw)->hw_base + (ofs))
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static inline void _ipw_write8(struct ipw_priv *ipw, unsigned long ofs,
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u8 val)
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{
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writeb(val, ipw->hw_base + ofs);
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}
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/* 8-bit direct write (for low 4K of SRAM/regs), with debug wrapper */
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#define ipw_write8(ipw, ofs, val) do { \
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IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
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_ipw_write8(ipw, ofs, val); \
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} while (0)
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IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, \
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__LINE__, (u32)(ofs), (u32)(val)); \
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_ipw_write8(ipw, ofs, val); \
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} while (0)
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/* 16-bit direct write (low 4K) */
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#define _ipw_write16(ipw, ofs, val) writew((val), (ipw)->hw_base + (ofs))
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static inline void _ipw_write16(struct ipw_priv *ipw, unsigned long ofs,
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u16 val)
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{
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writew(val, ipw->hw_base + ofs);
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}
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/* 16-bit direct write (for low 4K of SRAM/regs), with debug wrapper */
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#define ipw_write16(ipw, ofs, val) \
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IPW_DEBUG_IO("%s %d: write_direct16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
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_ipw_write16(ipw, ofs, val)
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#define ipw_write16(ipw, ofs, val) do { \
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IPW_DEBUG_IO("%s %d: write_direct16(0x%08X, 0x%08X)\n", __FILE__, \
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__LINE__, (u32)(ofs), (u32)(val)); \
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_ipw_write16(ipw, ofs, val); \
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} while (0)
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/* 32-bit direct write (low 4K) */
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#define _ipw_write32(ipw, ofs, val) writel((val), (ipw)->hw_base + (ofs))
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static inline void _ipw_write32(struct ipw_priv *ipw, unsigned long ofs,
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u32 val)
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{
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writel(val, ipw->hw_base + ofs);
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}
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/* 32-bit direct write (for low 4K of SRAM/regs), with debug wrapper */
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#define ipw_write32(ipw, ofs, val) \
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IPW_DEBUG_IO("%s %d: write_direct32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
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_ipw_write32(ipw, ofs, val)
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#define ipw_write32(ipw, ofs, val) do { \
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IPW_DEBUG_IO("%s %d: write_direct32(0x%08X, 0x%08X)\n", __FILE__, \
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__LINE__, (u32)(ofs), (u32)(val)); \
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_ipw_write32(ipw, ofs, val); \
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} while (0)
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/* 8-bit direct read (low 4K) */
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#define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs))
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/* 8-bit direct read (low 4K), with debug wrapper */
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static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
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static inline u8 _ipw_read8(struct ipw_priv *ipw, unsigned long ofs)
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{
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IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32) (ofs));
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return _ipw_read8(ipw, ofs);
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return readb(ipw->hw_base + ofs);
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}
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/* alias to 8-bit direct read (low 4K of SRAM/regs), with debug wrapper */
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#define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs)
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#define ipw_read8(ipw, ofs) ({ \
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IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", __FILE__, __LINE__, \
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(u32)(ofs)); \
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_ipw_read8(ipw, ofs); \
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})
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/* 16-bit direct read (low 4K) */
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#define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs))
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/* 16-bit direct read (low 4K), with debug wrapper */
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static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
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static inline u16 _ipw_read16(struct ipw_priv *ipw, unsigned long ofs)
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{
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IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32) (ofs));
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return _ipw_read16(ipw, ofs);
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return readw(ipw->hw_base + ofs);
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}
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/* alias to 16-bit direct read (low 4K of SRAM/regs), with debug wrapper */
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#define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs)
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#define ipw_read16(ipw, ofs) ({ \
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IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", __FILE__, __LINE__, \
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(u32)(ofs)); \
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_ipw_read16(ipw, ofs); \
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})
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/* 32-bit direct read (low 4K) */
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#define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs))
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/* 32-bit direct read (low 4K), with debug wrapper */
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static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
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static inline u32 _ipw_read32(struct ipw_priv *ipw, unsigned long ofs)
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{
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IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32) (ofs));
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return _ipw_read32(ipw, ofs);
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return readl(ipw->hw_base + ofs);
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}
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/* alias to 32-bit direct read (low 4K of SRAM/regs), with debug wrapper */
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#define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs)
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#define ipw_read32(ipw, ofs) ({ \
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IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", __FILE__, __LINE__, \
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(u32)(ofs)); \
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_ipw_read32(ipw, ofs); \
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})
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/* multi-byte read (above 4K), with debug wrapper */
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static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int);
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static inline void __ipw_read_indirect(const char *f, int l,
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struct ipw_priv *a, u32 b, u8 * c, int d)
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{
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IPW_DEBUG_IO("%s %d: read_indirect(0x%08X) %d bytes\n", f, l, (u32) (b),
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d);
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_ipw_read_indirect(a, b, c, d);
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}
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/* alias to multi-byte read (SRAM/regs above 4K), with debug wrapper */
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#define ipw_read_indirect(a, b, c, d) __ipw_read_indirect(__FILE__, __LINE__, a, b, c, d)
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#define ipw_read_indirect(a, b, c, d) ({ \
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IPW_DEBUG_IO("%s %d: read_indirect(0x%08X) %u bytes\n", __FILE__, \
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__LINE__, (u32)(b), (u32)(d)); \
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_ipw_read_indirect(a, b, c, d); \
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})
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/* alias to multi-byte read (SRAM/regs above 4K), with debug wrapper */
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static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * data,
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int num);
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#define ipw_write_indirect(a, b, c, d) \
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IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
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_ipw_write_indirect(a, b, c, d)
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#define ipw_write_indirect(a, b, c, d) do { \
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IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %u bytes\n", __FILE__, \
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__LINE__, (u32)(b), (u32)(d)); \
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_ipw_write_indirect(a, b, c, d); \
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} while (0)
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/* 32-bit indirect write (above 4K) */
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static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value)
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