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arm64: dts: imx8mq-librem5-r3: workaround i2c1 issue with 1GHz cpu voltage

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This is a workaround for a hardware bug in the r3 revision that basically would
stop the system due to traffic on the i2c1 bus. A cpu voltage change would
trigger such traffic and that's what is avoided in order to work around it.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Martin Kepplinger 2020-12-22 16:13:47 +01:00 committed by Shawn Guo
parent 6a67d8fbee
commit 1773b8d669
1 changed files with 6 additions and 0 deletions
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6
arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dts
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@ -10,6 +10,12 @@
compatible = "purism,librem5r3", "purism,librem5", "fsl,imx8mq";
};
&a53_opp_table {
opp-1000000000 {
opp-microvolt = <1000000>;
};
};
&accel_gyro {
mount-matrix = "1", "0", "0",
"0", "1", "0",