forked from Minki/linux
net/mlx5e: IPSec, Add IPSec ethtool stats
Add Innova IPSec SBU counters to the ethtool -S stats. Add IPSec offload error counters to the ethtool -S stats. Signed-off-by: Ilan Tayari <ilant@mellanox.com> Reviewed-by: Boris Pismenny <borisp@mellanox.com> Reviewed-by: Gal Pressman <galp@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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2ac9cfe782
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164f16f702
@ -20,4 +20,5 @@ mlx5_core-$(CONFIG_MLX5_CORE_EN_DCB) += en_dcbnl.o
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mlx5_core-$(CONFIG_MLX5_CORE_IPOIB) += ipoib/ipoib.o ipoib/ethtool.o
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mlx5_core-$(CONFIG_MLX5_EN_IPSEC) += en_accel/ipsec.o en_accel/ipsec_rxtx.o
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mlx5_core-$(CONFIG_MLX5_EN_IPSEC) += en_accel/ipsec.o en_accel/ipsec_rxtx.o \
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en_accel/ipsec_stats.o
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@ -57,12 +57,30 @@ struct mlx5e_ipsec_sw_stats {
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atomic64_t ipsec_tx_drop_metadata;
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};
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struct mlx5e_ipsec_stats {
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u64 ipsec_dec_in_packets;
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u64 ipsec_dec_out_packets;
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u64 ipsec_dec_bypass_packets;
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u64 ipsec_enc_in_packets;
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u64 ipsec_enc_out_packets;
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u64 ipsec_enc_bypass_packets;
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u64 ipsec_dec_drop_packets;
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u64 ipsec_dec_auth_fail_packets;
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u64 ipsec_enc_drop_packets;
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u64 ipsec_add_sa_success;
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u64 ipsec_add_sa_fail;
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u64 ipsec_del_sa_success;
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u64 ipsec_del_sa_fail;
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u64 ipsec_cmd_drop;
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};
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struct mlx5e_ipsec {
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struct mlx5e_priv *en_priv;
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DECLARE_HASHTABLE(sadb_rx, MLX5E_IPSEC_SADB_RX_BITS);
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spinlock_t sadb_rx_lock; /* Protects sadb_rx and halloc */
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struct ida halloc;
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struct mlx5e_ipsec_sw_stats sw_stats;
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struct mlx5e_ipsec_stats stats;
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};
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void mlx5e_ipsec_build_inverse_table(void);
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@ -70,6 +88,11 @@ int mlx5e_ipsec_init(struct mlx5e_priv *priv);
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void mlx5e_ipsec_cleanup(struct mlx5e_priv *priv);
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void mlx5e_ipsec_build_netdev(struct mlx5e_priv *priv);
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int mlx5e_ipsec_get_count(struct mlx5e_priv *priv);
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int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv, uint8_t *data);
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void mlx5e_ipsec_update_stats(struct mlx5e_priv *priv);
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int mlx5e_ipsec_get_stats(struct mlx5e_priv *priv, u64 *data);
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struct xfrm_state *mlx5e_ipsec_sadb_rx_lookup(struct mlx5e_ipsec *dev,
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unsigned int handle);
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@ -92,6 +115,26 @@ static inline void mlx5e_ipsec_build_netdev(struct mlx5e_priv *priv)
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{
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}
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static inline int mlx5e_ipsec_get_count(struct mlx5e_priv *priv)
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{
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return 0;
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}
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static inline int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv,
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uint8_t *data)
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{
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return 0;
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}
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static inline void mlx5e_ipsec_update_stats(struct mlx5e_priv *priv)
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{
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}
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static inline int mlx5e_ipsec_get_stats(struct mlx5e_priv *priv, u64 *data)
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{
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return 0;
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}
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#endif
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#endif /* __MLX5E_IPSEC_H__ */
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133
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c
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133
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_stats.c
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@ -0,0 +1,133 @@
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/*
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* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <linux/ethtool.h>
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#include <net/sock.h>
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#include "en.h"
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#include "accel/ipsec.h"
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#include "fpga/sdk.h"
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#include "en_accel/ipsec.h"
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static const struct counter_desc mlx5e_ipsec_hw_stats_desc[] = {
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_in_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_out_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_bypass_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_in_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_out_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_bypass_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_drop_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_auth_fail_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_drop_packets) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_success) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_fail) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_success) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_fail) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_cmd_drop) },
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};
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static const struct counter_desc mlx5e_ipsec_sw_stats_desc[] = {
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sp_alloc) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sadb_miss) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_syndrome) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_bundle) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_no_state) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_not_ip) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_trailer) },
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{ MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_metadata) },
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};
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#define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \
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atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))
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#define NUM_IPSEC_HW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_hw_stats_desc)
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#define NUM_IPSEC_SW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_sw_stats_desc)
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#define NUM_IPSEC_COUNTERS (NUM_IPSEC_HW_COUNTERS + NUM_IPSEC_SW_COUNTERS)
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int mlx5e_ipsec_get_count(struct mlx5e_priv *priv)
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{
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if (!priv->ipsec)
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return 0;
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return NUM_IPSEC_COUNTERS;
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}
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int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv, uint8_t *data)
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{
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unsigned int i, idx = 0;
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if (!priv->ipsec)
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return 0;
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for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
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strcpy(data + (idx++) * ETH_GSTRING_LEN,
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mlx5e_ipsec_hw_stats_desc[i].format);
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for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
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strcpy(data + (idx++) * ETH_GSTRING_LEN,
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mlx5e_ipsec_sw_stats_desc[i].format);
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return NUM_IPSEC_COUNTERS;
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}
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void mlx5e_ipsec_update_stats(struct mlx5e_priv *priv)
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{
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int ret;
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if (!priv->ipsec)
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return;
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ret = mlx5_accel_ipsec_counters_read(priv->mdev, (u64 *)&priv->ipsec->stats,
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NUM_IPSEC_HW_COUNTERS);
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if (ret)
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memset(&priv->ipsec->stats, 0, sizeof(priv->ipsec->stats));
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}
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int mlx5e_ipsec_get_stats(struct mlx5e_priv *priv, u64 *data)
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{
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int i, idx = 0;
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if (!priv->ipsec)
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return 0;
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for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
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data[idx++] = MLX5E_READ_CTR64_CPU(&priv->ipsec->stats,
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mlx5e_ipsec_hw_stats_desc, i);
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for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
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data[idx++] = MLX5E_READ_CTR_ATOMIC64(&priv->ipsec->sw_stats,
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mlx5e_ipsec_sw_stats_desc, i);
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return NUM_IPSEC_COUNTERS;
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}
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*/
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#include "en.h"
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#include "en_accel/ipsec.h"
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void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
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struct ethtool_drvinfo *drvinfo)
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@ -186,7 +187,8 @@ int mlx5e_ethtool_get_sset_count(struct mlx5e_priv *priv, int sset)
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MLX5E_NUM_SQ_STATS(priv) +
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MLX5E_NUM_PFC_COUNTERS(priv) +
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ARRAY_SIZE(mlx5e_pme_status_desc) +
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ARRAY_SIZE(mlx5e_pme_error_desc);
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ARRAY_SIZE(mlx5e_pme_error_desc) +
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mlx5e_ipsec_get_count(priv);
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case ETH_SS_PRIV_FLAGS:
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return ARRAY_SIZE(mlx5e_priv_flags);
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@ -275,6 +277,9 @@ static void mlx5e_fill_stats_strings(struct mlx5e_priv *priv, uint8_t *data)
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for (i = 0; i < ARRAY_SIZE(mlx5e_pme_error_desc); i++)
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strcpy(data + (idx++) * ETH_GSTRING_LEN, mlx5e_pme_error_desc[i].format);
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/* IPSec counters */
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idx += mlx5e_ipsec_get_strings(priv, data + idx * ETH_GSTRING_LEN);
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if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
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return;
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@ -403,6 +408,9 @@ void mlx5e_ethtool_get_ethtool_stats(struct mlx5e_priv *priv,
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data[idx++] = MLX5E_READ_CTR64_CPU(mlx5_priv->pme_stats.error_counters,
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mlx5e_pme_error_desc, i);
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/* IPSec counters */
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idx += mlx5e_ipsec_get_stats(priv, data + idx);
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if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
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return;
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@ -331,8 +331,10 @@ static void mlx5e_update_pcie_counters(struct mlx5e_priv *priv)
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void mlx5e_update_stats(struct mlx5e_priv *priv, bool full)
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{
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if (full)
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if (full) {
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mlx5e_update_pcie_counters(priv);
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mlx5e_ipsec_update_stats(priv);
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}
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mlx5e_update_pport_counters(priv, full);
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mlx5e_update_vport_counters(priv);
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mlx5e_update_q_counter(priv);
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