PCI: aardvark: Rewrite IRQ code to chained IRQ handler

Rewrite the code to use irq_set_chained_handler_and_data() handler with
chained_irq_enter() and chained_irq_exit() processing instead of using
devm_request_irq().

advk_pcie_irq_handler() reads IRQ status bits and calls other functions
based on which bits are set. These functions then read its own IRQ status
bits and calls other aardvark functions based on these bits. Finally
generic_handle_domain_irq() with translated linux IRQ numbers are called.

Link: https://lore.kernel.org/r/20220110015018.26359-5-kabel@kernel.org
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
This commit is contained in:
Pali Rohár 2022-01-10 02:49:59 +01:00 committed by Lorenzo Pieralisi
parent b0b0b8b897
commit 1571d67dc1

View File

@ -268,6 +268,7 @@ struct advk_pcie {
u32 actions; u32 actions;
} wins[OB_WIN_COUNT]; } wins[OB_WIN_COUNT];
u8 wins_count; u8 wins_count;
int irq;
struct irq_domain *irq_domain; struct irq_domain *irq_domain;
struct irq_chip irq_chip; struct irq_chip irq_chip;
raw_spinlock_t irq_lock; raw_spinlock_t irq_lock;
@ -1428,21 +1429,26 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie)
} }
} }
static irqreturn_t advk_pcie_irq_handler(int irq, void *arg) static void advk_pcie_irq_handler(struct irq_desc *desc)
{ {
struct advk_pcie *pcie = arg; struct advk_pcie *pcie = irq_desc_get_handler_data(desc);
u32 status; struct irq_chip *chip = irq_desc_get_chip(desc);
u32 val, mask, status;
status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); chained_irq_enter(chip, desc);
if (!(status & PCIE_IRQ_CORE_INT))
return IRQ_NONE;
val = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG);
mask = advk_readl(pcie, HOST_CTRL_INT_MASK_REG);
status = val & ((~mask) & PCIE_IRQ_ALL_MASK);
if (status & PCIE_IRQ_CORE_INT) {
advk_pcie_handle_int(pcie); advk_pcie_handle_int(pcie);
/* Clear interrupt */ /* Clear interrupt */
advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG);
}
return IRQ_HANDLED; chained_irq_exit(chip, desc);
} }
static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie)
@ -1509,7 +1515,7 @@ static int advk_pcie_probe(struct platform_device *pdev)
struct advk_pcie *pcie; struct advk_pcie *pcie;
struct pci_host_bridge *bridge; struct pci_host_bridge *bridge;
struct resource_entry *entry; struct resource_entry *entry;
int ret, irq; int ret;
bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie)); bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie));
if (!bridge) if (!bridge)
@ -1595,17 +1601,9 @@ static int advk_pcie_probe(struct platform_device *pdev)
if (IS_ERR(pcie->base)) if (IS_ERR(pcie->base))
return PTR_ERR(pcie->base); return PTR_ERR(pcie->base);
irq = platform_get_irq(pdev, 0); pcie->irq = platform_get_irq(pdev, 0);
if (irq < 0) if (pcie->irq < 0)
return irq; return pcie->irq;
ret = devm_request_irq(dev, irq, advk_pcie_irq_handler,
IRQF_SHARED | IRQF_NO_THREAD, "advk-pcie",
pcie);
if (ret) {
dev_err(dev, "Failed to register interrupt\n");
return ret;
}
pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node, pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node,
"reset-gpios", 0, "reset-gpios", 0,
@ -1654,11 +1652,14 @@ static int advk_pcie_probe(struct platform_device *pdev)
return ret; return ret;
} }
irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie);
bridge->sysdata = pcie; bridge->sysdata = pcie;
bridge->ops = &advk_pcie_ops; bridge->ops = &advk_pcie_ops;
ret = pci_host_probe(bridge); ret = pci_host_probe(bridge);
if (ret < 0) { if (ret < 0) {
irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);
advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_msi_irq_domain(pcie);
advk_pcie_remove_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie);
return ret; return ret;
@ -1706,6 +1707,9 @@ static int advk_pcie_remove(struct platform_device *pdev)
advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);
advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);
/* Remove IRQ handler */
irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);
/* Remove IRQ domains */ /* Remove IRQ domains */
advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_msi_irq_domain(pcie);
advk_pcie_remove_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie);