forked from Minki/linux
phy: rockchip-inno-usb2: add support for rockchip,usbgrf property
The registers of usb-phy are distributed in grf and usbgrf on some Rockchip SoCs (e.g RV1108), this patch add a new rockchip,usbgrf property to support this companion grf design. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Frank Wang
Kishon Vijay Abraham I
parent
4b63743cdb
commit
1543645c31
@ -202,6 +202,7 @@ struct rockchip_usb2phy_port {
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/**
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* struct rockchip_usb2phy: usb2.0 phy driver data.
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* @grf: General Register Files regmap.
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* @usbgrf: USB General Register Files regmap.
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* @clk: clock struct of phy input clk.
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* @clk480m: clock struct of phy output clk.
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* @clk_hw: clock struct of phy output clk management.
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@ -216,6 +217,7 @@ struct rockchip_usb2phy_port {
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struct rockchip_usb2phy {
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struct device *dev;
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struct regmap *grf;
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struct regmap *usbgrf;
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struct clk *clk;
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struct clk *clk480m;
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struct clk_hw clk480m_hw;
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@ -227,7 +229,12 @@ struct rockchip_usb2phy {
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struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
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};
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static inline int property_enable(struct rockchip_usb2phy *rphy,
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static inline struct regmap *get_reg_base(struct rockchip_usb2phy *rphy)
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{
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return rphy->usbgrf == NULL ? rphy->grf : rphy->usbgrf;
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}
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static inline int property_enable(struct regmap *base,
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const struct usb2phy_reg *reg, bool en)
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{
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unsigned int val, mask, tmp;
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@ -236,17 +243,17 @@ static inline int property_enable(struct rockchip_usb2phy *rphy,
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mask = GENMASK(reg->bitend, reg->bitstart);
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val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
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return regmap_write(rphy->grf, reg->offset, val);
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return regmap_write(base, reg->offset, val);
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}
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static inline bool property_enabled(struct rockchip_usb2phy *rphy,
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static inline bool property_enabled(struct regmap *base,
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const struct usb2phy_reg *reg)
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{
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int ret;
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unsigned int tmp, orig;
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unsigned int mask = GENMASK(reg->bitend, reg->bitstart);
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ret = regmap_read(rphy->grf, reg->offset, &orig);
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ret = regmap_read(base, reg->offset, &orig);
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if (ret)
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return false;
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@ -258,11 +265,12 @@ static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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struct regmap *base = get_reg_base(rphy);
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int ret;
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/* turn on 480m clk output if it is off */
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if (!property_enabled(rphy, &rphy->phy_cfg->clkout_ctl)) {
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ret = property_enable(rphy, &rphy->phy_cfg->clkout_ctl, true);
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if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) {
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ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true);
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if (ret)
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return ret;
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@ -277,17 +285,19 @@ static void rockchip_usb2phy_clk480m_unprepare(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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struct regmap *base = get_reg_base(rphy);
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/* turn off 480m clk output */
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property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false);
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property_enable(base, &rphy->phy_cfg->clkout_ctl, false);
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}
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static int rockchip_usb2phy_clk480m_prepared(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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struct regmap *base = get_reg_base(rphy);
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return property_enabled(rphy, &rphy->phy_cfg->clkout_ctl);
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return property_enabled(base, &rphy->phy_cfg->clkout_ctl);
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}
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static unsigned long
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@ -409,13 +419,13 @@ static int rockchip_usb2phy_init(struct phy *phy)
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if (rport->mode != USB_DR_MODE_HOST &&
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rport->mode != USB_DR_MODE_UNKNOWN) {
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/* clear bvalid status and enable bvalid detect irq */
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ret = property_enable(rphy,
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ret = property_enable(rphy->grf,
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&rport->port_cfg->bvalid_det_clr,
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true);
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if (ret)
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goto out;
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ret = property_enable(rphy,
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ret = property_enable(rphy->grf,
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&rport->port_cfg->bvalid_det_en,
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true);
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if (ret)
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@ -429,11 +439,13 @@ static int rockchip_usb2phy_init(struct phy *phy)
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}
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} else if (rport->port_id == USB2PHY_PORT_HOST) {
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/* clear linestate and enable linestate detect irq */
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ret = property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
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ret = property_enable(rphy->grf,
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&rport->port_cfg->ls_det_clr, true);
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if (ret)
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goto out;
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ret = property_enable(rphy, &rport->port_cfg->ls_det_en, true);
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ret = property_enable(rphy->grf,
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&rport->port_cfg->ls_det_en, true);
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if (ret)
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goto out;
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@ -449,6 +461,7 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
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struct regmap *base = get_reg_base(rphy);
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int ret;
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dev_dbg(&rport->phy->dev, "port power on\n");
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@ -460,7 +473,7 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
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if (ret)
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return ret;
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ret = property_enable(rphy, &rport->port_cfg->phy_sus, false);
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ret = property_enable(base, &rport->port_cfg->phy_sus, false);
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if (ret)
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return ret;
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@ -475,6 +488,7 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
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struct regmap *base = get_reg_base(rphy);
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int ret;
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dev_dbg(&rport->phy->dev, "port power off\n");
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@ -482,7 +496,7 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
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if (rport->suspended)
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return 0;
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ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
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ret = property_enable(base, &rport->port_cfg->phy_sus, true);
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if (ret)
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return ret;
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@ -526,11 +540,11 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
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bool vbus_attach, sch_work, notify_charger;
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if (rport->utmi_avalid)
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vbus_attach =
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property_enabled(rphy, &rport->port_cfg->utmi_avalid);
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vbus_attach = property_enabled(rphy->grf,
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&rport->port_cfg->utmi_avalid);
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else
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vbus_attach =
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property_enabled(rphy, &rport->port_cfg->utmi_bvalid);
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vbus_attach = property_enabled(rphy->grf,
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&rport->port_cfg->utmi_bvalid);
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sch_work = false;
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notify_charger = false;
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@ -650,22 +664,28 @@ static const char *chg_to_string(enum power_supply_type chg_type)
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static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
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bool en)
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{
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property_enable(rphy, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
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property_enable(rphy, &rphy->phy_cfg->chg_det.idp_src_en, en);
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struct regmap *base = get_reg_base(rphy);
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property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
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property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);
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}
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static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
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bool en)
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{
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property_enable(rphy, &rphy->phy_cfg->chg_det.vdp_src_en, en);
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property_enable(rphy, &rphy->phy_cfg->chg_det.idm_sink_en, en);
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struct regmap *base = get_reg_base(rphy);
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property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);
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property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);
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}
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static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
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bool en)
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{
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property_enable(rphy, &rphy->phy_cfg->chg_det.vdm_src_en, en);
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property_enable(rphy, &rphy->phy_cfg->chg_det.idp_sink_en, en);
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struct regmap *base = get_reg_base(rphy);
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property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);
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property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);
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}
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#define CHG_DCD_POLL_TIME (100 * HZ / 1000)
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@ -677,6 +697,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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struct rockchip_usb2phy_port *rport =
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container_of(work, struct rockchip_usb2phy_port, chg_work.work);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
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struct regmap *base = get_reg_base(rphy);
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bool is_dcd, tmout, vout;
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unsigned long delay;
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@ -687,7 +708,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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if (!rport->suspended)
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rockchip_usb2phy_power_off(rport->phy);
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/* put the controller in non-driving mode */
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property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, false);
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property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);
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/* Start DCD processing stage 1 */
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rockchip_chg_enable_dcd(rphy, true);
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rphy->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
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@ -696,7 +717,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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break;
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case USB_CHG_STATE_WAIT_FOR_DCD:
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/* get data contact detection status */
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is_dcd = property_enabled(rphy, &rphy->phy_cfg->chg_det.dp_det);
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is_dcd = property_enabled(rphy->grf,
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&rphy->phy_cfg->chg_det.dp_det);
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tmout = ++rphy->dcd_retries == CHG_DCD_MAX_RETRIES;
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/* stage 2 */
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if (is_dcd || tmout) {
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@ -713,7 +735,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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}
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break;
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case USB_CHG_STATE_DCD_DONE:
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vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.cp_det);
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vout = property_enabled(rphy->grf,
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&rphy->phy_cfg->chg_det.cp_det);
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rockchip_chg_enable_primary_det(rphy, false);
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if (vout) {
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/* Voltage Source on DM, Probe on DP */
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@ -734,7 +757,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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}
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break;
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case USB_CHG_STATE_PRIMARY_DONE:
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vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.dcp_det);
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vout = property_enabled(rphy->grf,
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&rphy->phy_cfg->chg_det.dcp_det);
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/* Turn off voltage source */
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rockchip_chg_enable_secondary_det(rphy, false);
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if (vout)
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@ -748,7 +772,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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/* fall through */
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case USB_CHG_STATE_DETECTED:
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/* put the controller in normal mode */
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property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, true);
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property_enable(base, &rphy->phy_cfg->chg_det.opmode, true);
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rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work);
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dev_info(&rport->phy->dev, "charger = %s\n",
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chg_to_string(rphy->chg_type));
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@ -790,8 +814,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work)
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if (ret < 0)
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goto next_schedule;
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ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset,
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&uhd);
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ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd);
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if (ret < 0)
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goto next_schedule;
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@ -845,8 +868,8 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work)
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* activate the linestate detection to get the next device
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* plug-in irq.
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*/
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property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
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property_enable(rphy, &rport->port_cfg->ls_det_en, true);
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property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true);
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property_enable(rphy->grf, &rport->port_cfg->ls_det_en, true);
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/*
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* we don't need to rearm the delayed work when the phy port
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@ -869,14 +892,14 @@ static irqreturn_t rockchip_usb2phy_linestate_irq(int irq, void *data)
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struct rockchip_usb2phy_port *rport = data;
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struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
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if (!property_enabled(rphy, &rport->port_cfg->ls_det_st))
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if (!property_enabled(rphy->grf, &rport->port_cfg->ls_det_st))
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return IRQ_NONE;
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mutex_lock(&rport->mutex);
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/* disable linestate detect irq and clear its status */
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property_enable(rphy, &rport->port_cfg->ls_det_en, false);
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property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
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property_enable(rphy->grf, &rport->port_cfg->ls_det_en, false);
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property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true);
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mutex_unlock(&rport->mutex);
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@ -896,13 +919,13 @@ static irqreturn_t rockchip_usb2phy_bvalid_irq(int irq, void *data)
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struct rockchip_usb2phy_port *rport = data;
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struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
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if (!property_enabled(rphy, &rport->port_cfg->bvalid_det_st))
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if (!property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st))
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return IRQ_NONE;
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mutex_lock(&rport->mutex);
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/* clear bvalid detect irq pending status */
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property_enable(rphy, &rport->port_cfg->bvalid_det_clr, true);
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property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true);
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mutex_unlock(&rport->mutex);
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@ -1045,6 +1068,16 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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if (IS_ERR(rphy->grf))
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return PTR_ERR(rphy->grf);
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if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
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rphy->usbgrf =
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syscon_regmap_lookup_by_phandle(dev->of_node,
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"rockchip,usbgrf");
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if (IS_ERR(rphy->usbgrf))
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return PTR_ERR(rphy->usbgrf);
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} else {
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rphy->usbgrf = NULL;
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}
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if (of_property_read_u32(np, "reg", ®)) {
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dev_err(dev, "the reg property is not assigned in %s node\n",
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np->name);
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