forked from Minki/linux
net: hns: Fix sparse: some warnings in HNS drivers
There are some sparse warnings in the HNS drivers: warning: incorrect type in assignment (different address spaces) expected void [noderef] <asn:2> *io_base got void *vaddr warning: cast removes address space '<asn:2>' of expression [...] Add __iomem and change all the u8 __iomem to void __iomem to fix these kind of warnings. warning: incorrect type in argument 1 (different address spaces) expected void [noderef] <asn:2> *base got unsigned char [usertype] *base_addr warning: cast to restricted __le16 warning: incorrect type in assignment (different base types) expected unsigned int [usertype] tbl_tcam_data_high got restricted __le32 [usertype] warning: cast to restricted __le32 [...] These variables used u32/u16 as their type, and finally as a parameter of writel(), writel() will do the cpu_to_le32 coversion so remove the little endian covert code to fix these kind of warnings. Signed-off-by: Yonglong Liu <liuyonglong@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -357,7 +357,7 @@ struct hnae_buf_ops {
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};
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struct hnae_queue {
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void __iomem *io_base;
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u8 __iomem *io_base;
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phys_addr_t phy_base;
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struct hnae_ae_dev *dev; /* the device who use this queue */
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struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp;
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@ -370,7 +370,7 @@ int hns_mac_clr_multicast(struct hns_mac_cb *mac_cb, int vfn)
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static void hns_mac_param_get(struct mac_params *param,
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struct hns_mac_cb *mac_cb)
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{
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param->vaddr = (void *)mac_cb->vaddr;
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param->vaddr = mac_cb->vaddr;
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param->mac_mode = hns_get_enet_interface(mac_cb);
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ether_addr_copy(param->addr, mac_cb->addr_entry_idx[0].addr);
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param->mac_id = mac_cb->mac_id;
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@ -187,7 +187,7 @@ struct mac_statistics {
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/*mac para struct ,mac get param from nic or dsaf when initialize*/
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struct mac_params {
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char addr[ETH_ALEN];
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void *vaddr; /*virtual address*/
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u8 __iomem *vaddr; /*virtual address*/
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struct device *dev;
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u8 mac_id;
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/**< Ethernet operation mode (MAC-PHY interface and speed) */
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@ -402,7 +402,7 @@ struct mac_driver {
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enum mac_mode mac_mode;
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u8 mac_id;
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struct hns_mac_cb *mac_cb;
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void __iomem *io_base;
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u8 __iomem *io_base;
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unsigned int mac_en_flg;/*you'd better don't enable mac twice*/
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unsigned int virt_dev_num;
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struct device *dev;
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@ -1602,8 +1602,6 @@ static void hns_dsaf_set_mac_key(
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DSAF_TBL_TCAM_KEY_VLAN_S, vlan_id);
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dsaf_set_field(mac_key->low.bits.port_vlan, DSAF_TBL_TCAM_KEY_PORT_M,
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DSAF_TBL_TCAM_KEY_PORT_S, port);
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mac_key->low.bits.port_vlan = le16_to_cpu(mac_key->low.bits.port_vlan);
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}
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/**
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@ -1663,8 +1661,8 @@ int hns_dsaf_set_mac_uc_entry(
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/* default config dvc to 0 */
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mac_data.tbl_ucast_dvc = 0;
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mac_data.tbl_ucast_out_port = mac_entry->port_num;
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tcam_data.tbl_tcam_data_high = cpu_to_le32(mac_key.high.val);
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tcam_data.tbl_tcam_data_low = cpu_to_le32(mac_key.low.val);
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tcam_data.tbl_tcam_data_high = mac_key.high.val;
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tcam_data.tbl_tcam_data_low = mac_key.low.val;
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hns_dsaf_tcam_uc_cfg(dsaf_dev, entry_index, &tcam_data, &mac_data);
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@ -1786,9 +1784,6 @@ int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
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0xff,
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mc_mask);
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mask_key.high.val = le32_to_cpu(mask_key.high.val);
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mask_key.low.val = le32_to_cpu(mask_key.low.val);
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pmask_key = (struct dsaf_tbl_tcam_data *)(&mask_key);
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}
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@ -1840,8 +1835,8 @@ int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
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dsaf_dev->ae_dev.name, mac_key.high.val,
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mac_key.low.val, entry_index);
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tcam_data.tbl_tcam_data_high = cpu_to_le32(mac_key.high.val);
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tcam_data.tbl_tcam_data_low = cpu_to_le32(mac_key.low.val);
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tcam_data.tbl_tcam_data_high = mac_key.high.val;
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tcam_data.tbl_tcam_data_low = mac_key.low.val;
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/* config mc entry with mask */
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hns_dsaf_tcam_mc_cfg(dsaf_dev, entry_index, &tcam_data,
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@ -1956,9 +1951,6 @@ int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
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/* config key mask */
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hns_dsaf_set_mac_key(dsaf_dev, &mask_key, 0x00, 0xff, mc_mask);
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mask_key.high.val = le32_to_cpu(mask_key.high.val);
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mask_key.low.val = le32_to_cpu(mask_key.low.val);
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pmask_key = (struct dsaf_tbl_tcam_data *)(&mask_key);
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}
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@ -2012,8 +2004,8 @@ int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
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soft_mac_entry += entry_index;
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soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
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} else { /* not zero, just del port, update */
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tcam_data.tbl_tcam_data_high = cpu_to_le32(mac_key.high.val);
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tcam_data.tbl_tcam_data_low = cpu_to_le32(mac_key.low.val);
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tcam_data.tbl_tcam_data_high = mac_key.high.val;
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tcam_data.tbl_tcam_data_low = mac_key.low.val;
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hns_dsaf_tcam_mc_cfg(dsaf_dev, entry_index,
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&tcam_data,
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@ -467,4 +467,6 @@ int hns_dsaf_clr_mac_mc_port(struct dsaf_device *dsaf_dev,
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u8 mac_id, u8 port_num);
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int hns_dsaf_wait_pkt_clean(struct dsaf_device *dsaf_dev, int port);
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int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool dereset);
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#endif /* __HNS_DSAF_MAIN_H__ */
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@ -670,7 +670,7 @@ static int hns_mac_config_sds_loopback(struct hns_mac_cb *mac_cb, bool en)
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dsaf_set_field(origin, 1ull << 10, 10, en);
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dsaf_write_syscon(mac_cb->serdes_ctrl, reg_offset, origin);
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} else {
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u8 *base_addr = (u8 *)mac_cb->serdes_vaddr +
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u8 __iomem *base_addr = mac_cb->serdes_vaddr +
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(mac_cb->mac_id <= 3 ? 0x00280000 : 0x00200000);
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dsaf_set_reg_field(base_addr, reg_offset, 1ull << 10, 10, en);
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}
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@ -61,7 +61,7 @@ void hns_ppe_set_indir_table(struct hns_ppe_cb *ppe_cb,
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}
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}
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static void __iomem *
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static u8 __iomem *
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hns_ppe_common_get_ioaddr(struct ppe_common_cb *ppe_common)
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{
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return ppe_common->dsaf_dev->ppe_base + PPE_COMMON_REG_OFFSET;
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@ -111,8 +111,8 @@ hns_ppe_common_free_cfg(struct dsaf_device *dsaf_dev, u32 comm_index)
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dsaf_dev->ppe_common[comm_index] = NULL;
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}
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static void __iomem *hns_ppe_get_iobase(struct ppe_common_cb *ppe_common,
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int ppe_idx)
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static u8 __iomem *hns_ppe_get_iobase(struct ppe_common_cb *ppe_common,
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int ppe_idx)
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{
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return ppe_common->dsaf_dev->ppe_base + ppe_idx * PPE_REG_OFFSET;
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}
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@ -80,7 +80,7 @@ struct hns_ppe_cb {
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struct hns_ppe_hw_stats hw_stats;
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u8 index; /* index in a ppe common device */
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void __iomem *io_base;
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u8 __iomem *io_base;
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int virq;
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u32 rss_indir_table[HNS_PPEV2_RSS_IND_TBL_SIZE]; /*shadow indir tab */
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u32 rss_key[HNS_PPEV2_RSS_KEY_NUM]; /* rss hash key */
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@ -89,7 +89,7 @@ struct hns_ppe_cb {
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struct ppe_common_cb {
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struct device *dev;
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struct dsaf_device *dsaf_dev;
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void __iomem *io_base;
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u8 __iomem *io_base;
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enum ppe_common_mode ppe_mode;
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@ -458,7 +458,7 @@ static void hns_rcb_ring_get_cfg(struct hnae_queue *q, int ring_type)
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mdnum_ppkt = HNS_RCB_RING_MAX_BD_PER_PKT;
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} else {
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ring = &q->tx_ring;
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ring->io_base = (u8 __iomem *)ring_pair_cb->q.io_base +
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ring->io_base = ring_pair_cb->q.io_base +
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HNS_RCB_TX_REG_OFFSET;
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irq_idx = HNS_RCB_IRQ_IDX_TX;
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mdnum_ppkt = is_ver1 ? HNS_RCB_RING_MAX_TXBD_PER_PKT :
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@ -764,7 +764,7 @@ static int hns_rcb_get_ring_num(struct dsaf_device *dsaf_dev)
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}
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}
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static void __iomem *hns_rcb_common_get_vaddr(struct rcb_common_cb *rcb_common)
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static u8 __iomem *hns_rcb_common_get_vaddr(struct rcb_common_cb *rcb_common)
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{
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struct dsaf_device *dsaf_dev = rcb_common->dsaf_dev;
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@ -1018,7 +1018,7 @@
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#define XGMAC_PAUSE_CTL_RSP_MODE_B 2
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#define XGMAC_PAUSE_CTL_TX_XOFF_B 3
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static inline void dsaf_write_reg(void __iomem *base, u32 reg, u32 value)
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static inline void dsaf_write_reg(u8 __iomem *base, u32 reg, u32 value)
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{
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writel(value, base + reg);
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}
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@ -1053,7 +1053,7 @@ static inline int dsaf_read_syscon(struct regmap *base, u32 reg, u32 *val)
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#define dsaf_set_bit(origin, shift, val) \
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dsaf_set_field((origin), (1ull << (shift)), (shift), (val))
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static inline void dsaf_set_reg_field(void __iomem *base, u32 reg, u32 mask,
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static inline void dsaf_set_reg_field(u8 __iomem *base, u32 reg, u32 mask,
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u32 shift, u32 val)
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{
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u32 origin = dsaf_read_reg(base, reg);
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@ -1073,7 +1073,7 @@ static inline void dsaf_set_reg_field(void __iomem *base, u32 reg, u32 mask,
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#define dsaf_get_bit(origin, shift) \
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dsaf_get_field((origin), (1ull << (shift)), (shift))
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static inline u32 dsaf_get_reg_field(void __iomem *base, u32 reg, u32 mask,
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static inline u32 dsaf_get_reg_field(u8 __iomem *base, u32 reg, u32 mask,
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u32 shift)
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{
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u32 origin;
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@ -1089,11 +1089,11 @@ static inline u32 dsaf_get_reg_field(void __iomem *base, u32 reg, u32 mask,
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dsaf_get_reg_field((dev)->io_base, (reg), (1ull << (bit)), (bit))
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#define dsaf_write_b(addr, data)\
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writeb((data), (__iomem unsigned char *)(addr))
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writeb((data), (__iomem u8 *)(addr))
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#define dsaf_read_b(addr)\
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readb((__iomem unsigned char *)(addr))
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readb((__iomem u8 *)(addr))
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#define hns_mac_reg_read64(drv, offset) \
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readq((__iomem void *)(((u8 *)(drv)->io_base + 0xc00 + (offset))))
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readq((__iomem void *)(((drv)->io_base + 0xc00 + (offset))))
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#endif /* _DSAF_REG_H */
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@ -39,7 +39,7 @@ struct hns_mdio_sc_reg {
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};
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struct hns_mdio_device {
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void *vbase; /* mdio reg base address */
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u8 __iomem *vbase; /* mdio reg base address */
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struct regmap *subctrl_vbase;
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struct hns_mdio_sc_reg sc_reg;
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};
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@ -96,21 +96,17 @@ enum mdio_c45_op_seq {
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#define MDIO_SC_CLK_ST 0x531C
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#define MDIO_SC_RESET_ST 0x5A1C
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static void mdio_write_reg(void *base, u32 reg, u32 value)
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static void mdio_write_reg(u8 __iomem *base, u32 reg, u32 value)
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{
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u8 __iomem *reg_addr = (u8 __iomem *)base;
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writel_relaxed(value, reg_addr + reg);
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writel_relaxed(value, base + reg);
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}
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#define MDIO_WRITE_REG(a, reg, value) \
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mdio_write_reg((a)->vbase, (reg), (value))
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static u32 mdio_read_reg(void *base, u32 reg)
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static u32 mdio_read_reg(u8 __iomem *base, u32 reg)
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{
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u8 __iomem *reg_addr = (u8 __iomem *)base;
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return readl_relaxed(reg_addr + reg);
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return readl_relaxed(base + reg);
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}
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#define mdio_set_field(origin, mask, shift, val) \
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@ -121,7 +117,7 @@ static u32 mdio_read_reg(void *base, u32 reg)
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#define mdio_get_field(origin, mask, shift) (((origin) >> (shift)) & (mask))
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static void mdio_set_reg_field(void *base, u32 reg, u32 mask, u32 shift,
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static void mdio_set_reg_field(u8 __iomem *base, u32 reg, u32 mask, u32 shift,
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u32 val)
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{
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u32 origin = mdio_read_reg(base, reg);
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@ -133,7 +129,7 @@ static void mdio_set_reg_field(void *base, u32 reg, u32 mask, u32 shift,
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#define MDIO_SET_REG_FIELD(dev, reg, mask, shift, val) \
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mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))
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static u32 mdio_get_reg_field(void *base, u32 reg, u32 mask, u32 shift)
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static u32 mdio_get_reg_field(u8 __iomem *base, u32 reg, u32 mask, u32 shift)
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{
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u32 origin;
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