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staging: comedi: ni_tio: tidy up Gi_DMA_Config_Reg_Bits

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Convert this enum into defines and rename the CamelCase symbols.

For aesthetics, move the new defines so they are associated with
the register define.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2014-07-28 10:26:56 -07:00 committed by Greg Kroah-Hartman
parent 29c2003d11
commit 150dde701f
3 changed files with 10 additions and 19 deletions
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8
drivers/staging/comedi/drivers/ni_stc.h
View File

@ -1285,14 +1285,6 @@ static inline unsigned MSeries_PFI_Output_Select_Source(unsigned channel,
return (bits >> ((channel % 3) * 5)) & 0x1f;
};
enum MSeries_Gi_DMA_Config_Bits {
Gi_DMA_BankSW_Error_Bit = 0x10,
Gi_DMA_Reset_Bit = 0x8,
Gi_DMA_Int_Enable_Bit = 0x4,
Gi_DMA_Write_Bit = 0x2,
Gi_DMA_Enable_Bit = 0x1,
};
static inline unsigned MSeries_PFI_Filter_Select_Mask(unsigned channel)
{
return 0x3 << (channel * 2);

11
drivers/staging/comedi/drivers/ni_tio_internal.h
View File

@ -133,18 +133,17 @@
#define GI_HW_SAVE(x) (((x) % 2) ? (1 << 13) : (1 << 12))
#define GI_PERMANENT_STALE(x) (((x) % 2) ? (1 << 15) : (1 << 14))
#define NITIO_DMA_CFG_REG(x) (NITIO_G0_DMA_CFG + (x))
#define GI_DMA_ENABLE (1 << 0)
#define GI_DMA_WRITE (1 << 1)
#define GI_DMA_INT_ENA (1 << 2)
#define GI_DMA_RESET (1 << 3)
#define GI_DMA_BANKSW_ERROR (1 << 4)
#define NITIO_DMA_STATUS_REG(x) (NITIO_G0_DMA_STATUS + (x))
#define NITIO_ABZ_REG(x) (NITIO_G0_ABZ + (x))
#define NITIO_INT_ACK_REG(x) (NITIO_G0_INT_ACK + (x))
#define NITIO_STATUS_REG(x) (NITIO_G0_STATUS + (x))
#define NITIO_INT_ENA_REG(x) (NITIO_G0_INT_ENA + (x))
enum Gi_DMA_Config_Reg_Bits {
Gi_DMA_Enable_Bit = 0x1,
Gi_DMA_Write_Bit = 0x2,
Gi_DMA_Int_Bit = 0x4
};
enum Gi_DMA_Status_Reg_Bits {
Gi_DMA_Readbank_Bit = 0x2000,
Gi_DRQ_Error_Bit = 0x4000,

10
drivers/staging/comedi/drivers/ni_tiocmd.c
View File

@ -74,14 +74,14 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
unsigned gi_dma_config_bits = 0;
if (enable) {
gi_dma_config_bits |= Gi_DMA_Enable_Bit;
gi_dma_config_bits |= Gi_DMA_Int_Bit;
gi_dma_config_bits |= GI_DMA_ENABLE;
gi_dma_config_bits |= GI_DMA_INT_ENA;
}
if (read_not_write == 0)
gi_dma_config_bits |= Gi_DMA_Write_Bit;
gi_dma_config_bits |= GI_DMA_WRITE;
ni_tio_set_bits(counter, NITIO_DMA_CFG_REG(cidx),
Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit |
Gi_DMA_Write_Bit, gi_dma_config_bits);
GI_DMA_ENABLE | GI_DMA_INT_ENA |
GI_DMA_WRITE, gi_dma_config_bits);
}
break;
}