From 4ceedeb1b68e376ccfec9f8d2e46bcd541702aba Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sat, 24 Mar 2018 23:07:41 +0300 Subject: [PATCH 1/5] sh_eth: add sh_eth_cpu_data::soft_reset() method sh_eth_reset() performs a software reset which is implemented in a completely different way for the GEther-like controllers vs the other controllers due to a different layout of EDMR (and other factors) -- it therefore makes sense to convert this function to a mandatory sh_eth_cpu_data::soft_reset() method and thus get rid of the runtime controller type check via sh_eth_is_{gether|rz_fast_ether}(). Signed-off-by: Sergei Shtylyov Signed-off-by: David S. Miller --- drivers/net/ethernet/renesas/sh_eth.c | 135 +++++++++++++++----------- drivers/net/ethernet/renesas/sh_eth.h | 3 + 2 files changed, 83 insertions(+), 55 deletions(-) diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index 3557fe3f2bb5..e7d980f9df7d 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -501,6 +501,62 @@ static void sh_eth_chip_reset(struct net_device *ndev) mdelay(1); } +static int sh_eth_soft_reset(struct net_device *ndev) +{ + sh_eth_modify(ndev, EDMR, EDMR_SRST_ETHER, EDMR_SRST_ETHER); + mdelay(3); + sh_eth_modify(ndev, EDMR, EDMR_SRST_ETHER, 0); + + return 0; +} + +static int sh_eth_check_soft_reset(struct net_device *ndev) +{ + int cnt; + + for (cnt = 100; cnt > 0; cnt--) { + if (!(sh_eth_read(ndev, EDMR) & EDMR_SRST_GETHER)) + return 0; + mdelay(1); + } + + netdev_err(ndev, "Device reset failed\n"); + return -ETIMEDOUT; +} + +static int sh_eth_soft_reset_gether(struct net_device *ndev) +{ + struct sh_eth_private *mdp = netdev_priv(ndev); + int ret; + + sh_eth_write(ndev, EDSR_ENALL, EDSR); + sh_eth_modify(ndev, EDMR, EDMR_SRST_GETHER, EDMR_SRST_GETHER); + + ret = sh_eth_check_soft_reset(ndev); + if (ret) + return ret; + + /* Table Init */ + sh_eth_write(ndev, 0, TDLAR); + sh_eth_write(ndev, 0, TDFAR); + sh_eth_write(ndev, 0, TDFXR); + sh_eth_write(ndev, 0, TDFFR); + sh_eth_write(ndev, 0, RDLAR); + sh_eth_write(ndev, 0, RDFAR); + sh_eth_write(ndev, 0, RDFXR); + sh_eth_write(ndev, 0, RDFFR); + + /* Reset HW CRC register */ + if (mdp->cd->hw_checksum) + sh_eth_write(ndev, 0, CSMR); + + /* Select MII mode */ + if (mdp->cd->select_mii) + sh_eth_select_mii(ndev); + + return ret; +} + static void sh_eth_set_rate_gether(struct net_device *ndev) { struct sh_eth_private *mdp = netdev_priv(ndev); @@ -521,6 +577,8 @@ static void sh_eth_set_rate_gether(struct net_device *ndev) #ifdef CONFIG_OF /* R7S72100 */ static struct sh_eth_cpu_data r7s72100_data = { + .soft_reset = sh_eth_soft_reset_gether, + .chip_reset = sh_eth_chip_reset, .set_duplex = sh_eth_set_duplex, @@ -565,6 +623,8 @@ static void sh_eth_chip_reset_r8a7740(struct net_device *ndev) /* R8A7740 */ static struct sh_eth_cpu_data r8a7740_data = { + .soft_reset = sh_eth_soft_reset_gether, + .chip_reset = sh_eth_chip_reset_r8a7740, .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_gether, @@ -620,6 +680,8 @@ static void sh_eth_set_rate_rcar(struct net_device *ndev) /* R-Car Gen1 */ static struct sh_eth_cpu_data rcar_gen1_data = { + .soft_reset = sh_eth_soft_reset, + .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_rcar, @@ -647,6 +709,8 @@ static struct sh_eth_cpu_data rcar_gen1_data = { /* R-Car Gen2 and RZ/G1 */ static struct sh_eth_cpu_data rcar_gen2_data = { + .soft_reset = sh_eth_soft_reset, + .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_rcar, @@ -694,6 +758,8 @@ static void sh_eth_set_rate_sh7724(struct net_device *ndev) /* SH7724 */ static struct sh_eth_cpu_data sh7724_data = { + .soft_reset = sh_eth_soft_reset, + .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_sh7724, @@ -736,6 +802,8 @@ static void sh_eth_set_rate_sh7757(struct net_device *ndev) /* SH7757 */ static struct sh_eth_cpu_data sh7757_data = { + .soft_reset = sh_eth_soft_reset, + .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_sh7757, @@ -808,6 +876,8 @@ static void sh_eth_set_rate_giga(struct net_device *ndev) /* SH7757(GETHERC) */ static struct sh_eth_cpu_data sh7757_data_giga = { + .soft_reset = sh_eth_soft_reset_gether, + .chip_reset = sh_eth_chip_reset_giga, .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_giga, @@ -847,6 +917,8 @@ static struct sh_eth_cpu_data sh7757_data_giga = { /* SH7734 */ static struct sh_eth_cpu_data sh7734_data = { + .soft_reset = sh_eth_soft_reset_gether, + .chip_reset = sh_eth_chip_reset, .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_gether, @@ -883,6 +955,8 @@ static struct sh_eth_cpu_data sh7734_data = { /* SH7763 */ static struct sh_eth_cpu_data sh7763_data = { + .soft_reset = sh_eth_soft_reset_gether, + .chip_reset = sh_eth_chip_reset, .set_duplex = sh_eth_set_duplex, .set_rate = sh_eth_set_rate_gether, @@ -917,6 +991,8 @@ static struct sh_eth_cpu_data sh7763_data = { }; static struct sh_eth_cpu_data sh7619_data = { + .soft_reset = sh_eth_soft_reset, + .register_type = SH_ETH_REG_FAST_SH3_SH2, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | @@ -935,6 +1011,8 @@ static struct sh_eth_cpu_data sh7619_data = { }; static struct sh_eth_cpu_data sh771x_data = { + .soft_reset = sh_eth_soft_reset, + .register_type = SH_ETH_REG_FAST_SH3_SH2, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | @@ -974,59 +1052,6 @@ static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd) cd->trscer_err_mask = DEFAULT_TRSCER_ERR_MASK; } -static int sh_eth_check_reset(struct net_device *ndev) -{ - int cnt; - - for (cnt = 100; cnt > 0; cnt--) { - if (!(sh_eth_read(ndev, EDMR) & EDMR_SRST_GETHER)) - return 0; - mdelay(1); - } - - netdev_err(ndev, "Device reset failed\n"); - return -ETIMEDOUT; -} - -static int sh_eth_reset(struct net_device *ndev) -{ - struct sh_eth_private *mdp = netdev_priv(ndev); - int ret = 0; - - if (sh_eth_is_gether(mdp) || sh_eth_is_rz_fast_ether(mdp)) { - sh_eth_write(ndev, EDSR_ENALL, EDSR); - sh_eth_modify(ndev, EDMR, EDMR_SRST_GETHER, EDMR_SRST_GETHER); - - ret = sh_eth_check_reset(ndev); - if (ret) - return ret; - - /* Table Init */ - sh_eth_write(ndev, 0x0, TDLAR); - sh_eth_write(ndev, 0x0, TDFAR); - sh_eth_write(ndev, 0x0, TDFXR); - sh_eth_write(ndev, 0x0, TDFFR); - sh_eth_write(ndev, 0x0, RDLAR); - sh_eth_write(ndev, 0x0, RDFAR); - sh_eth_write(ndev, 0x0, RDFXR); - sh_eth_write(ndev, 0x0, RDFFR); - - /* Reset HW CRC register */ - if (mdp->cd->hw_checksum) - sh_eth_write(ndev, 0x0, CSMR); - - /* Select MII mode */ - if (mdp->cd->select_mii) - sh_eth_select_mii(ndev); - } else { - sh_eth_modify(ndev, EDMR, EDMR_SRST_ETHER, EDMR_SRST_ETHER); - mdelay(3); - sh_eth_modify(ndev, EDMR, EDMR_SRST_ETHER, 0); - } - - return ret; -} - static void sh_eth_set_receive_align(struct sk_buff *skb) { uintptr_t reserve = (uintptr_t)skb->data & (SH_ETH_RX_ALIGN - 1); @@ -1362,7 +1387,7 @@ static int sh_eth_dev_init(struct net_device *ndev) int ret; /* Soft Reset */ - ret = sh_eth_reset(ndev); + ret = mdp->cd->soft_reset(ndev); if (ret) return ret; @@ -1463,7 +1488,7 @@ static void sh_eth_dev_exit(struct net_device *ndev) */ msleep(2); /* max frame time at 10 Mbps < 1250 us */ sh_eth_get_stats(ndev); - sh_eth_reset(ndev); + mdp->cd->soft_reset(ndev); /* Set MAC address again */ update_mac_address(ndev); diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h index 21047d58a93f..ff3520b0d86f 100644 --- a/drivers/net/ethernet/renesas/sh_eth.h +++ b/drivers/net/ethernet/renesas/sh_eth.h @@ -469,6 +469,9 @@ struct sh_eth_rxdesc { /* This structure is used by each CPU dependency handling. */ struct sh_eth_cpu_data { + /* mandatory functions */ + int (*soft_reset)(struct net_device *ndev); + /* optional functions */ void (*chip_reset)(struct net_device *ndev); void (*set_duplex)(struct net_device *ndev); From 3e416992e2fae2c3177bed157534503691dc3510 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sat, 24 Mar 2018 23:08:42 +0300 Subject: [PATCH 2/5] sh_eth: add sh_eth_cpu_data::edtrr_trns value sh_eth_get_edtrr_trns() returns the value to be written to EDTRR in order to start TX DMA -- this value is different between the GEther-like and the other controllers. We can replace this function (and thus get rid of the calls to sh_eth_is_{gether|rz_fast_ether}() by it) with a new field 'edtrr_trns' in the 'struct sh_eth_cpu_data'. Signed-off-by: Sergei Shtylyov Signed-off-by: David S. Miller --- drivers/net/ethernet/renesas/sh_eth.c | 27 +++++++++++++++------------ drivers/net/ethernet/renesas/sh_eth.h | 1 + 2 files changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index e7d980f9df7d..d4a11ff24496 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -584,6 +584,7 @@ static struct sh_eth_cpu_data r7s72100_data = { .register_type = SH_ETH_REG_FAST_RZ, + .edtrr_trns = EDTRR_TRNS_GETHER, .ecsr_value = ECSR_ICD, .ecsipr_value = ECSIPR_ICDIP, .eesipr_value = EESIPR_TWB1IP | EESIPR_TWBIP | EESIPR_TC1IP | @@ -631,6 +632,7 @@ static struct sh_eth_cpu_data r8a7740_data = { .register_type = SH_ETH_REG_GIGABIT, + .edtrr_trns = EDTRR_TRNS_GETHER, .ecsr_value = ECSR_ICD | ECSR_MPD, .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | @@ -687,6 +689,7 @@ static struct sh_eth_cpu_data rcar_gen1_data = { .register_type = SH_ETH_REG_FAST_RCAR, + .edtrr_trns = EDTRR_TRNS_ETHER, .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD, .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP | @@ -716,6 +719,7 @@ static struct sh_eth_cpu_data rcar_gen2_data = { .register_type = SH_ETH_REG_FAST_RCAR, + .edtrr_trns = EDTRR_TRNS_ETHER, .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD | ECSR_MPD, .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, @@ -765,6 +769,7 @@ static struct sh_eth_cpu_data sh7724_data = { .register_type = SH_ETH_REG_FAST_SH4, + .edtrr_trns = EDTRR_TRNS_ETHER, .ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD, .ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ADEIP | EESIPR_ECIIP | @@ -809,6 +814,7 @@ static struct sh_eth_cpu_data sh7757_data = { .register_type = SH_ETH_REG_FAST_SH4, + .edtrr_trns = EDTRR_TRNS_ETHER, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP | EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP | @@ -884,6 +890,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = { .register_type = SH_ETH_REG_GIGABIT, + .edtrr_trns = EDTRR_TRNS_GETHER, .ecsr_value = ECSR_ICD | ECSR_MPD, .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | @@ -925,6 +932,7 @@ static struct sh_eth_cpu_data sh7734_data = { .register_type = SH_ETH_REG_GIGABIT, + .edtrr_trns = EDTRR_TRNS_GETHER, .ecsr_value = ECSR_ICD | ECSR_MPD, .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | @@ -963,6 +971,7 @@ static struct sh_eth_cpu_data sh7763_data = { .register_type = SH_ETH_REG_GIGABIT, + .edtrr_trns = EDTRR_TRNS_GETHER, .ecsr_value = ECSR_ICD | ECSR_MPD, .ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | @@ -995,6 +1004,7 @@ static struct sh_eth_cpu_data sh7619_data = { .register_type = SH_ETH_REG_FAST_SH3_SH2, + .edtrr_trns = EDTRR_TRNS_ETHER, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP | EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP | @@ -1015,6 +1025,7 @@ static struct sh_eth_cpu_data sh771x_data = { .register_type = SH_ETH_REG_FAST_SH3_SH2, + .edtrr_trns = EDTRR_TRNS_ETHER, .eesipr_value = EESIPR_RFCOFIP | EESIPR_ECIIP | EESIPR_FTCIP | EESIPR_TDEIP | EESIPR_TFUFIP | EESIPR_FRIP | EESIPR_RDEIP | EESIPR_RFOFIP | @@ -1094,14 +1105,6 @@ static void read_mac_address(struct net_device *ndev, unsigned char *mac) } } -static u32 sh_eth_get_edtrr_trns(struct sh_eth_private *mdp) -{ - if (sh_eth_is_gether(mdp) || sh_eth_is_rz_fast_ether(mdp)) - return EDTRR_TRNS_GETHER; - else - return EDTRR_TRNS_ETHER; -} - struct bb_info { void (*set_gate)(void *addr); struct mdiobb_ctrl ctrl; @@ -1741,9 +1744,9 @@ static void sh_eth_error(struct net_device *ndev, u32 intr_status) sh_eth_tx_free(ndev, true); /* SH7712 BUG */ - if (edtrr ^ sh_eth_get_edtrr_trns(mdp)) { + if (edtrr ^ mdp->cd->edtrr_trns) { /* tx dma start */ - sh_eth_write(ndev, sh_eth_get_edtrr_trns(mdp), EDTRR); + sh_eth_write(ndev, mdp->cd->edtrr_trns, EDTRR); } /* wakeup */ netif_wake_queue(ndev); @@ -2502,8 +2505,8 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev) mdp->cur_tx++; - if (!(sh_eth_read(ndev, EDTRR) & sh_eth_get_edtrr_trns(mdp))) - sh_eth_write(ndev, sh_eth_get_edtrr_trns(mdp), EDTRR); + if (!(sh_eth_read(ndev, EDTRR) & mdp->cd->edtrr_trns)) + sh_eth_write(ndev, mdp->cd->edtrr_trns, EDTRR); return NETDEV_TX_OK; } diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h index ff3520b0d86f..aa3c45153c9a 100644 --- a/drivers/net/ethernet/renesas/sh_eth.h +++ b/drivers/net/ethernet/renesas/sh_eth.h @@ -479,6 +479,7 @@ struct sh_eth_cpu_data { /* mandatory initialize value */ int register_type; + u32 edtrr_trns; u32 eesipr_value; /* optional initialize value */ From 246e30cc4fd8db8390e83617fa5ff29ad5280ad9 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sat, 24 Mar 2018 23:09:55 +0300 Subject: [PATCH 3/5] sh_eth: add sh_eth_cpu_data::xdfar_rw flag The GEther-like controllers have writeable RDFAR/TDFAR, on the others they are read-only or just absent (on R-Car). Currently we are calling sh_eth_is_{gether|rz_fast_ether}() in order to check if these registers can be written to, however it would be simpler to check the new 'xdfar_rw' bitfield in the 'struct sh_eth_cpu_data'... Signed-off-by: Sergei Shtylyov Signed-off-by: David S. Miller --- drivers/net/ethernet/renesas/sh_eth.c | 11 +++++++---- drivers/net/ethernet/renesas/sh_eth.h | 1 + 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index d4a11ff24496..294fecd42901 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -611,6 +611,7 @@ static struct sh_eth_cpu_data r7s72100_data = { .rpadir_value = 2 << 16, .no_trimd = 1, .no_ade = 1, + .xdfar_rw = 1, .hw_checksum = 1, .tsu = 1, }; @@ -659,6 +660,7 @@ static struct sh_eth_cpu_data r8a7740_data = { .rpadir_value = 2 << 16, .no_trimd = 1, .no_ade = 1, + .xdfar_rw = 1, .hw_checksum = 1, .tsu = 1, .select_mii = 1, @@ -918,6 +920,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = { .rpadir_value = 2 << 16, .no_trimd = 1, .no_ade = 1, + .xdfar_rw = 1, .tsu = 1, .dual_port = 1, }; @@ -955,6 +958,7 @@ static struct sh_eth_cpu_data sh7734_data = { .hw_swap = 1, .no_trimd = 1, .no_ade = 1, + .xdfar_rw = 1, .tsu = 1, .hw_checksum = 1, .select_mii = 1, @@ -993,6 +997,7 @@ static struct sh_eth_cpu_data sh7763_data = { .hw_swap = 1, .no_trimd = 1, .no_ade = 1, + .xdfar_rw = 1, .tsu = 1, .irq_flags = IRQF_SHARED, .magic = 1, @@ -1301,8 +1306,7 @@ static void sh_eth_ring_format(struct net_device *ndev) /* Rx descriptor address set */ if (i == 0) { sh_eth_write(ndev, mdp->rx_desc_dma, RDLAR); - if (sh_eth_is_gether(mdp) || - sh_eth_is_rz_fast_ether(mdp)) + if (mdp->cd->xdfar_rw) sh_eth_write(ndev, mdp->rx_desc_dma, RDFAR); } } @@ -1324,8 +1328,7 @@ static void sh_eth_ring_format(struct net_device *ndev) if (i == 0) { /* Tx descriptor address set */ sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR); - if (sh_eth_is_gether(mdp) || - sh_eth_is_rz_fast_ether(mdp)) + if (mdp->cd->xdfar_rw) sh_eth_write(ndev, mdp->tx_desc_dma, TDFAR); } } diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h index aa3c45153c9a..25c0b1db060a 100644 --- a/drivers/net/ethernet/renesas/sh_eth.h +++ b/drivers/net/ethernet/renesas/sh_eth.h @@ -508,6 +508,7 @@ struct sh_eth_cpu_data { unsigned rpadir:1; /* E-DMAC have RPADIR */ unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */ unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */ + unsigned xdfar_rw:1; /* E-DMAC has writeable RDFAR/TDFAR */ unsigned hw_checksum:1; /* E-DMAC has CSMR */ unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */ unsigned rmiimode:1; /* EtherC has RMIIMODE register */ From ce9134dff6d90c9f9c6bfd3d32dffdadf8a8e668 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sat, 24 Mar 2018 23:11:19 +0300 Subject: [PATCH 4/5] sh_eth: add sh_eth_cpu_data::no_tx_cntrs flag RZ/A1H (R7S72100) Ether controller doesn't seem to have the TX counter registers like TROCR/CDCR/LCCR (or at least they are still undocumented like some TSU registers), so we bail out of sh_eth_get_stats() early in this case. Currently we are calling sh_eth_is_rz_fast_ether() in order to check for this, but it would be simpler to check the new 'no_tx_cntrs' bitfield in the 'struct sh_eth_cpu_data'; then we'd be able to remove sh_eth_is_rz_fast_ether() as there would be no callers left... Signed-off-by: Sergei Shtylyov Signed-off-by: David S. Miller --- drivers/net/ethernet/renesas/sh_eth.c | 8 ++------ drivers/net/ethernet/renesas/sh_eth.h | 1 + 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index 294fecd42901..f1cd354b8f1c 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -455,11 +455,6 @@ static bool sh_eth_is_gether(struct sh_eth_private *mdp) return mdp->reg_offset == sh_eth_offset_gigabit; } -static bool sh_eth_is_rz_fast_ether(struct sh_eth_private *mdp) -{ - return mdp->reg_offset == sh_eth_offset_fast_rz; -} - static void sh_eth_select_mii(struct net_device *ndev) { struct sh_eth_private *mdp = netdev_priv(ndev); @@ -614,6 +609,7 @@ static struct sh_eth_cpu_data r7s72100_data = { .xdfar_rw = 1, .hw_checksum = 1, .tsu = 1, + .no_tx_cntrs = 1, }; static void sh_eth_chip_reset_r8a7740(struct net_device *ndev) @@ -2534,7 +2530,7 @@ static struct net_device_stats *sh_eth_get_stats(struct net_device *ndev) { struct sh_eth_private *mdp = netdev_priv(ndev); - if (sh_eth_is_rz_fast_ether(mdp)) + if (mdp->cd->no_tx_cntrs) return &ndev->stats; if (!mdp->is_opened) diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h index 25c0b1db060a..7ea162a56c77 100644 --- a/drivers/net/ethernet/renesas/sh_eth.h +++ b/drivers/net/ethernet/renesas/sh_eth.h @@ -514,6 +514,7 @@ struct sh_eth_cpu_data { unsigned rmiimode:1; /* EtherC has RMIIMODE register */ unsigned rtrate:1; /* EtherC has RTRATE register */ unsigned magic:1; /* EtherC has ECMR.MPDE and ECSR.MPD */ + unsigned no_tx_cntrs:1; /* EtherC DOES NOT have TX error counters */ unsigned dual_port:1; /* Dual EtherC/E-DMAC */ }; From 4c1d45850d5327049bce461743179b46adc33f9e Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sat, 24 Mar 2018 23:12:54 +0300 Subject: [PATCH 5/5] sh_eth: add sh_eth_cpu_data::cexcr flag GEther controllers have CERCR/CEECR instead of CNDCR on the others. Currently we are calling sh_eth_is_gether() in order to check for this, however it would be simpler to check the new 'cexcr' bitfield in the 'struct sh_eth_cpu_data'; then we'd be able to remove sh_eth_is_gether() as there would be no callers left... Signed-off-by: Sergei Shtylyov Signed-off-by: David S. Miller --- drivers/net/ethernet/renesas/sh_eth.c | 11 +++++------ drivers/net/ethernet/renesas/sh_eth.h | 1 + 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index f1cd354b8f1c..306558ef36b5 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -450,11 +450,6 @@ static u32 sh_eth_tsu_read(struct sh_eth_private *mdp, int enum_index) return ioread32(mdp->tsu_addr + mdp->reg_offset[enum_index]); } -static bool sh_eth_is_gether(struct sh_eth_private *mdp) -{ - return mdp->reg_offset == sh_eth_offset_gigabit; -} - static void sh_eth_select_mii(struct net_device *ndev) { struct sh_eth_private *mdp = netdev_priv(ndev); @@ -661,6 +656,7 @@ static struct sh_eth_cpu_data r8a7740_data = { .tsu = 1, .select_mii = 1, .magic = 1, + .cexcr = 1, }; /* There is CPU dependent code */ @@ -918,6 +914,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = { .no_ade = 1, .xdfar_rw = 1, .tsu = 1, + .cexcr = 1, .dual_port = 1, }; @@ -959,6 +956,7 @@ static struct sh_eth_cpu_data sh7734_data = { .hw_checksum = 1, .select_mii = 1, .magic = 1, + .cexcr = 1, }; /* SH7763 */ @@ -997,6 +995,7 @@ static struct sh_eth_cpu_data sh7763_data = { .tsu = 1, .irq_flags = IRQF_SHARED, .magic = 1, + .cexcr = 1, .dual_port = 1, }; @@ -2540,7 +2539,7 @@ static struct net_device_stats *sh_eth_get_stats(struct net_device *ndev) sh_eth_update_stat(ndev, &ndev->stats.collisions, CDCR); sh_eth_update_stat(ndev, &ndev->stats.tx_carrier_errors, LCCR); - if (sh_eth_is_gether(mdp)) { + if (mdp->cd->cexcr) { sh_eth_update_stat(ndev, &ndev->stats.tx_carrier_errors, CERCR); sh_eth_update_stat(ndev, &ndev->stats.tx_carrier_errors, diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h index 7ea162a56c77..a0416e04306a 100644 --- a/drivers/net/ethernet/renesas/sh_eth.h +++ b/drivers/net/ethernet/renesas/sh_eth.h @@ -515,6 +515,7 @@ struct sh_eth_cpu_data { unsigned rtrate:1; /* EtherC has RTRATE register */ unsigned magic:1; /* EtherC has ECMR.MPDE and ECSR.MPD */ unsigned no_tx_cntrs:1; /* EtherC DOES NOT have TX error counters */ + unsigned cexcr:1; /* EtherC has CERCR/CEECR */ unsigned dual_port:1; /* Dual EtherC/E-DMAC */ };