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Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

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* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (114 commits)
  [POWERPC] Fix ohare IDE irq workaround on old powermacs
  [POWERPC] EEH: Power4 systems sometimes need multiple resets.
  [POWERPC] Include <asm/mmu.h> in arch/powerpc/sysdev/fsl_soc.h for phys_addr_t.
  [POWERPC] Demacrofy arch/powerpc/platforms/maple/pci.c
  [POWERPC] Maple U3 HT - reject inappropriate config space access
  [POWERPC] Fix IPIC pending register assignments
  [POWERPC] powerpc: fix building gdb against asm/ptrace.h
  [POWERPC] Remove DISCONTIGMEM cruft from page.h
  [POWERPC] Merge iSeries i/o operations with the rest
  [POWERPC] 40x: Fix debug status register defines
  [POWERPC] Fix compile error in sbc8560
  [POWERPC] EEH: support MMIO enable recovery step
  [POWERPC] EEH: enable MMIO/DMA on frozen slot
  [POWERPC] EEH: code comment cleanup
  [POWERPC] EEH: balance pcidev_get/put calls
  [POWERPC] PPC: Fix xmon stack frame address in backtrace
  [POWERPC] Add AT_PLATFORM value for Xilinx Virtex-4 FX
  [POWERPC] Start arch/powerpc/boot code reorganization
  [POWERPC] Define of_read_ulong helper
  [POWERPC] iseries: eliminate a couple of warnings
  ...
This commit is contained in:
Linus Torvalds
2006-09-22 12:48:03 -07:00
parent e478bec0ba 69917c26c8
commit 14d1adfc59
219 changed files with 4347 additions and 2455 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
include/asm-powerpc/cputable.h
View File

@@ -23,6 +23,7 @@
#define PPC_FEATURE_SMT 0x00004000
#define PPC_FEATURE_ICACHE_SNOOP 0x00002000
#define PPC_FEATURE_ARCH_2_05 0x00001000
#define PPC_FEATURE_PA6T 0x00000800
#define PPC_FEATURE_TRUE_LE 0x00000002
#define PPC_FEATURE_PPC_LE 0x00000001
@@ -36,6 +37,7 @@
struct cpu_spec;
typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
typedef void (*cpu_restore_t)(void);
enum powerpc_oprofile_type {
PPC_OPROFILE_INVALID = 0,
@@ -65,6 +67,8 @@ struct cpu_spec {
* BHT, SPD, etc... from head.S before branching to identify_machine
*/
cpu_setup_t cpu_setup;
/* Used to restore cpu setup on secondary processors and at resume */
cpu_restore_t cpu_restore;
/* Used by oprofile userspace to select the right counters */
char *oprofile_cpu_type;
@@ -145,7 +149,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
#define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
CPU_FTR_NODSISRALIGN)
/* iSeries doesn't support large pages */
#ifdef CONFIG_PPC_ISERIES
@@ -310,24 +314,29 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \
CPU_FTR_MMCRA | CPU_FTR_CTRL)
#define CPU_FTRS_POWER4 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA)
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA)
#define CPU_FTRS_PPC970 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA)
#define CPU_FTRS_POWER5 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR)
#define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_REAL_LE)
#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
#define CPU_FTRS_PA6T (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
CPU_FTR_PURR | CPU_FTR_REAL_LE)
#define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
#endif
@@ -336,7 +345,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
#define CPU_FTRS_POSSIBLE \
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE)
CPU_FTRS_CELL | CPU_FTRS_PA6T)
#else
enum {
CPU_FTRS_POSSIBLE =
@@ -375,7 +384,7 @@ enum {
#define CPU_FTRS_ALWAYS \
(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
CPU_FTRS_CELL & CPU_FTRS_POSSIBLE)
CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
#else
enum {
CPU_FTRS_ALWAYS =

121
include/asm-powerpc/hvcall.h
View File

@@ -164,9 +164,15 @@
#define H_VIO_SIGNAL 0x104
#define H_SEND_CRQ 0x108
#define H_COPY_RDMA 0x110
#define H_REGISTER_LOGICAL_LAN 0x114
#define H_FREE_LOGICAL_LAN 0x118
#define H_ADD_LOGICAL_LAN_BUFFER 0x11C
#define H_SEND_LOGICAL_LAN 0x120
#define H_MULTICAST_CTRL 0x130
#define H_SET_XDABR 0x134
#define H_STUFF_TCE 0x138
#define H_PUT_TCE_INDIRECT 0x13C
#define H_CHANGE_LOGICAL_LAN_MAC 0x14C
#define H_VTERM_PARTNER_INFO 0x150
#define H_REGISTER_VTERM 0x154
#define H_FREE_VTERM 0x158
@@ -196,102 +202,59 @@
#define H_GET_HCA_INFO 0x1B8
#define H_GET_PERF_COUNT 0x1BC
#define H_MANAGE_TRACE 0x1C0
#define H_FREE_LOGICAL_LAN_BUFFER 0x1D4
#define H_QUERY_INT_STATE 0x1E4
#define H_POLL_PENDING 0x1D8
#define H_JOIN 0x298
#define H_VASI_STATE 0x2A4
#define H_ENABLE_CRQ 0x2B0
#define MAX_HCALL_OPCODE H_ENABLE_CRQ
#ifndef __ASSEMBLY__
/* plpar_hcall() -- Generic call interface using above opcodes
/**
* plpar_hcall_norets: - Make a pseries hypervisor call with no return arguments
* @opcode: The hypervisor call to make.
*
* The actual call interface is a hypervisor call instruction with
* the opcode in R3 and input args in R4-R7.
* Status is returned in R3 with variable output values in R4-R11.
* Only H_PTE_READ with H_READ_4 uses R6-R11 so we ignore it for now
* and return only two out args which MUST ALWAYS BE PROVIDED.
*/
long plpar_hcall(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long *out1,
unsigned long *out2,
unsigned long *out3);
/* Same as plpar_hcall but for those opcodes that return no values
* other than status. Slightly more efficient.
* This call supports up to 7 arguments and only returns the status of
* the hcall. Use this version where possible, its slightly faster than
* the other plpar_hcalls.
*/
long plpar_hcall_norets(unsigned long opcode, ...);
/*
* Special hcall interface for ibmveth support.
* Takes 8 input parms. Returns a rc and stores the
* R4 return value in *out1.
*/
long plpar_hcall_8arg_2ret(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long arg5,
unsigned long arg6,
unsigned long arg7,
unsigned long arg8,
unsigned long *out1);
/* plpar_hcall_4out()
/**
* plpar_hcall: - Make a pseries hypervisor call
* @opcode: The hypervisor call to make.
* @retbuf: Buffer to store up to 4 return arguments in.
*
* same as plpar_hcall except with 4 output arguments.
* This call supports up to 6 arguments and 4 return arguments. Use
* PLPAR_HCALL_BUFSIZE to size the return argument buffer.
*
* Used for all but the craziest of phyp interfaces (see plpar_hcall9)
*/
long plpar_hcall_4out(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long *out1,
unsigned long *out2,
unsigned long *out3,
unsigned long *out4);
#define PLPAR_HCALL_BUFSIZE 4
long plpar_hcall(unsigned long opcode, unsigned long *retbuf, ...);
long plpar_hcall_7arg_7ret(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long arg5,
unsigned long arg6,
unsigned long arg7,
unsigned long *out1,
unsigned long *out2,
unsigned long *out3,
unsigned long *out4,
unsigned long *out5,
unsigned long *out6,
unsigned long *out7);
/**
* plpar_hcall9: - Make a pseries hypervisor call with up to 9 return arguments
* @opcode: The hypervisor call to make.
* @retbuf: Buffer to store up to 9 return arguments in.
*
* This call supports up to 9 arguments and 9 return arguments. Use
* PLPAR_HCALL9_BUFSIZE to size the return argument buffer.
*/
#define PLPAR_HCALL9_BUFSIZE 9
long plpar_hcall9(unsigned long opcode, unsigned long *retbuf, ...);
long plpar_hcall_9arg_9ret(unsigned long opcode,
unsigned long arg1,
unsigned long arg2,
unsigned long arg3,
unsigned long arg4,
unsigned long arg5,
unsigned long arg6,
unsigned long arg7,
unsigned long arg8,
unsigned long arg9,
unsigned long *out1,
unsigned long *out2,
unsigned long *out3,
unsigned long *out4,
unsigned long *out5,
unsigned long *out6,
unsigned long *out7,
unsigned long *out8,
unsigned long *out9);
/* For hcall instrumentation. One structure per-hcall, per-CPU */
struct hcall_stats {
unsigned long num_calls; /* number of calls (on this CPU) */
unsigned long tb_total; /* total wall time (mftb) of calls. */
unsigned long purr_total; /* total cpu time (PURR) of calls. */
};
void update_hcall_stats(unsigned long opcode, unsigned long tb_delta,
unsigned long purr_delta);
#define HCALL_STAT_ARRAY_SIZE ((MAX_HCALL_OPCODE >> 2) + 1)
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */

2
include/asm-powerpc/ibmebus.h
View File

@@ -48,7 +48,7 @@ extern struct dma_mapping_ops ibmebus_dma_ops;
extern struct bus_type ibmebus_bus_type;
struct ibmebus_dev {
char *name;
const char *name;
struct of_device ofdev;
};

12
include/asm-powerpc/ide.h
View File

@@ -12,6 +12,7 @@
#include <linux/sched.h>
#include <asm/mpc8xx.h>
#endif
#include <asm/io.h>
#ifndef MAX_HWIFS
#ifdef __powerpc64__
@@ -21,15 +22,14 @@
#endif
#endif
#define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c))
#define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c))
#define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c))
#define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c))
#ifndef __powerpc64__
#include <linux/hdreg.h>
#include <linux/ioport.h>
#include <asm/io.h>
extern void __ide_mm_insw(void __iomem *port, void *addr, u32 count);
extern void __ide_mm_outsw(void __iomem *port, void *addr, u32 count);
extern void __ide_mm_insl(void __iomem *port, void *addr, u32 count);
extern void __ide_mm_outsl(void __iomem *port, void *addr, u32 count);
struct ide_machdep_calls {
int (*default_irq)(unsigned long base);

181
include/asm-powerpc/io.h
View File

@@ -20,20 +20,11 @@ extern int check_legacy_ioport(unsigned long base_port);
#include <asm/page.h>
#include <asm/byteorder.h>
#include <asm/paca.h>
#ifdef CONFIG_PPC_ISERIES
#include <asm/iseries/iseries_io.h>
#endif
#include <asm/synch.h>
#include <asm/delay.h>
#include <asm-generic/iomap.h>
#define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c))
#define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c))
#define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c))
#define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c))
#define SIO_CONFIG_RA 0x398
#define SIO_CONFIG_RD 0x399
@@ -43,42 +34,53 @@ extern unsigned long isa_io_base;
extern unsigned long pci_io_base;
#ifdef CONFIG_PPC_ISERIES
/* __raw_* accessors aren't supported on iSeries */
#define __raw_readb(addr) { BUG(); 0; }
#define __raw_readw(addr) { BUG(); 0; }
#define __raw_readl(addr) { BUG(); 0; }
#define __raw_readq(addr) { BUG(); 0; }
#define __raw_writeb(v, addr) { BUG(); 0; }
#define __raw_writew(v, addr) { BUG(); 0; }
#define __raw_writel(v, addr) { BUG(); 0; }
#define __raw_writeq(v, addr) { BUG(); 0; }
#define readb(addr) iSeries_Read_Byte(addr)
#define readw(addr) iSeries_Read_Word(addr)
#define readl(addr) iSeries_Read_Long(addr)
#define writeb(data, addr) iSeries_Write_Byte((data),(addr))
#define writew(data, addr) iSeries_Write_Word((data),(addr))
#define writel(data, addr) iSeries_Write_Long((data),(addr))
#define memset_io(a,b,c) iSeries_memset_io((a),(b),(c))
#define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c))
#define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c))
#define inb(addr) readb(((void __iomem *)(long)(addr)))
#define inw(addr) readw(((void __iomem *)(long)(addr)))
#define inl(addr) readl(((void __iomem *)(long)(addr)))
#define outb(data,addr) writeb(data,((void __iomem *)(long)(addr)))
#define outw(data,addr) writew(data,((void __iomem *)(long)(addr)))
#define outl(data,addr) writel(data,((void __iomem *)(long)(addr)))
/*
* The *_ns versions below don't do byte-swapping.
* Neither do the standard versions now, these are just here
* for older code.
*/
#define insb(port, buf, ns) _insb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
#define insw(port, buf, ns) _insw_ns((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
#define insl(port, buf, nl) _insl_ns((u8 __iomem *)((port)+pci_io_base), (buf), (nl))
#define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
#define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
#else
extern int in_8(const volatile unsigned char __iomem *addr);
extern void out_8(volatile unsigned char __iomem *addr, int val);
extern int in_le16(const volatile unsigned short __iomem *addr);
extern int in_be16(const volatile unsigned short __iomem *addr);
extern void out_le16(volatile unsigned short __iomem *addr, int val);
extern void out_be16(volatile unsigned short __iomem *addr, int val);
extern unsigned in_le32(const volatile unsigned __iomem *addr);
extern unsigned in_be32(const volatile unsigned __iomem *addr);
extern void out_le32(volatile unsigned __iomem *addr, int val);
extern void out_be32(volatile unsigned __iomem *addr, int val);
extern unsigned long in_le64(const volatile unsigned long __iomem *addr);
extern unsigned long in_be64(const volatile unsigned long __iomem *addr);
extern void out_le64(volatile unsigned long __iomem *addr, unsigned long val);
extern void out_be64(volatile unsigned long __iomem *addr, unsigned long val);
extern unsigned char __raw_readb(const volatile void __iomem *addr);
extern unsigned short __raw_readw(const volatile void __iomem *addr);
extern unsigned int __raw_readl(const volatile void __iomem *addr);
extern unsigned long __raw_readq(const volatile void __iomem *addr);
extern void __raw_writeb(unsigned char v, volatile void __iomem *addr);
extern void __raw_writew(unsigned short v, volatile void __iomem *addr);
extern void __raw_writel(unsigned int v, volatile void __iomem *addr);
extern void __raw_writeq(unsigned long v, volatile void __iomem *addr);
extern void memset_io(volatile void __iomem *addr, int c, unsigned long n);
extern void memcpy_fromio(void *dest, const volatile void __iomem *src,
unsigned long n);
extern void memcpy_toio(volatile void __iomem *dest, const void *src,
unsigned long n);
#else /* CONFIG_PPC_ISERIES */
#define in_8(addr) __in_8((addr))
#define out_8(addr, val) __out_8((addr), (val))
#define in_le16(addr) __in_le16((addr))
#define in_be16(addr) __in_be16((addr))
#define out_le16(addr, val) __out_le16((addr), (val))
#define out_be16(addr, val) __out_be16((addr), (val))
#define in_le32(addr) __in_le32((addr))
#define in_be32(addr) __in_be32((addr))
#define out_le32(addr, val) __out_le32((addr), (val))
#define out_be32(addr, val) __out_be32((addr), (val))
#define in_le64(addr) __in_le64((addr))
#define in_be64(addr) __in_be64((addr))
#define out_le64(addr, val) __out_le64((addr), (val))
#define out_be64(addr, val) __out_be64((addr), (val))
static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
@@ -112,23 +114,11 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
{
*(volatile unsigned long __force *)addr = v;
}
#define readb(addr) eeh_readb(addr)
#define readw(addr) eeh_readw(addr)
#define readl(addr) eeh_readl(addr)
#define readq(addr) eeh_readq(addr)
#define writeb(data, addr) eeh_writeb((data), (addr))
#define writew(data, addr) eeh_writew((data), (addr))
#define writel(data, addr) eeh_writel((data), (addr))
#define writeq(data, addr) eeh_writeq((data), (addr))
#define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
#define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
#define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
#define inb(port) eeh_inb((unsigned long)port)
#define outb(val, port) eeh_outb(val, (unsigned long)port)
#define inw(port) eeh_inw((unsigned long)port)
#define outw(val, port) eeh_outw(val, (unsigned long)port)
#define inl(port) eeh_inl((unsigned long)port)
#define outl(val, port) eeh_outl(val, (unsigned long)port)
#endif /* CONFIG_PPC_ISERIES */
/*
* The insw/outsw/insl/outsl macros don't do byte-swapping.
@@ -138,30 +128,37 @@ static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
#define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
#define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
#define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
#define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
#define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
#endif
#define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
#define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
#define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
#define readb(addr) eeh_readb(addr)
#define readw(addr) eeh_readw(addr)
#define readl(addr) eeh_readl(addr)
#define readq(addr) eeh_readq(addr)
#define writeb(data, addr) eeh_writeb((data), (addr))
#define writew(data, addr) eeh_writew((data), (addr))
#define writel(data, addr) eeh_writel((data), (addr))
#define writeq(data, addr) eeh_writeq((data), (addr))
#define inb(port) eeh_inb((unsigned long)port)
#define outb(val, port) eeh_outb(val, (unsigned long)port)
#define inw(port) eeh_inw((unsigned long)port)
#define outw(val, port) eeh_outw(val, (unsigned long)port)
#define inl(port) eeh_inl((unsigned long)port)
#define outl(val, port) eeh_outl(val, (unsigned long)port)
#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define readq_relaxed(addr) readq(addr)
extern void _insb(volatile u8 __iomem *port, void *buf, int ns);
extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns);
extern void _insw(volatile u16 __iomem *port, void *buf, int ns);
extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns);
extern void _insl(volatile u32 __iomem *port, void *buf, int nl);
extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl);
extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns);
extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns);
extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl);
extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl);
extern void _insb(volatile u8 __iomem *port, void *buf, long count);
extern void _outsb(volatile u8 __iomem *port, const void *buf, long count);
extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count);
extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count);
extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count);
extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count);
static inline void mmiowb(void)
{
@@ -180,14 +177,6 @@ static inline void mmiowb(void)
#define inl_p(port) inl(port)
#define outl_p(val, port) (udelay(1), outl((val), (port)))
/*
* The *_ns versions below don't do byte-swapping.
* Neither do the standard versions now, these are just here
* for older code.
*/
#define outsw_ns(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
#define outsl_ns(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
#define IO_SPACE_LIMIT ~(0UL)
@@ -279,7 +268,7 @@ static inline void iosync(void)
* and should not be used directly by device drivers. Use inb/readb
* instead.
*/
static inline int in_8(const volatile unsigned char __iomem *addr)
static inline int __in_8(const volatile unsigned char __iomem *addr)
{
int ret;
@@ -288,14 +277,14 @@ static inline int in_8(const volatile unsigned char __iomem *addr)
return ret;
}
static inline void out_8(volatile unsigned char __iomem *addr, int val)
static inline void __out_8(volatile unsigned char __iomem *addr, int val)
{
__asm__ __volatile__("sync; stb%U0%X0 %1,%0"
: "=m" (*addr) : "r" (val));
get_paca()->io_sync = 1;
}
static inline int in_le16(const volatile unsigned short __iomem *addr)
static inline int __in_le16(const volatile unsigned short __iomem *addr)
{
int ret;
@@ -304,7 +293,7 @@ static inline int in_le16(const volatile unsigned short __iomem *addr)
return ret;
}
static inline int in_be16(const volatile unsigned short __iomem *addr)
static inline int __in_be16(const volatile unsigned short __iomem *addr)
{
int ret;
@@ -313,21 +302,21 @@ static inline int in_be16(const volatile unsigned short __iomem *addr)
return ret;
}
static inline void out_le16(volatile unsigned short __iomem *addr, int val)
static inline void __out_le16(volatile unsigned short __iomem *addr, int val)
{
__asm__ __volatile__("sync; sthbrx %1,0,%2"
: "=m" (*addr) : "r" (val), "r" (addr));
get_paca()->io_sync = 1;
}
static inline void out_be16(volatile unsigned short __iomem *addr, int val)
static inline void __out_be16(volatile unsigned short __iomem *addr, int val)
{
__asm__ __volatile__("sync; sth%U0%X0 %1,%0"
: "=m" (*addr) : "r" (val));
get_paca()->io_sync = 1;
}
static inline unsigned in_le32(const volatile unsigned __iomem *addr)
static inline unsigned __in_le32(const volatile unsigned __iomem *addr)
{
unsigned ret;
@@ -336,7 +325,7 @@ static inline unsigned in_le32(const volatile unsigned __iomem *addr)
return ret;
}
static inline unsigned in_be32(const volatile unsigned __iomem *addr)
static inline unsigned __in_be32(const volatile unsigned __iomem *addr)
{
unsigned ret;
@@ -345,21 +334,21 @@ static inline unsigned in_be32(const volatile unsigned __iomem *addr)
return ret;
}
static inline void out_le32(volatile unsigned __iomem *addr, int val)
static inline void __out_le32(volatile unsigned __iomem *addr, int val)
{
__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr)
: "r" (val), "r" (addr));
get_paca()->io_sync = 1;
}
static inline void out_be32(volatile unsigned __iomem *addr, int val)
static inline void __out_be32(volatile unsigned __iomem *addr, int val)
{
__asm__ __volatile__("sync; stw%U0%X0 %1,%0"
: "=m" (*addr) : "r" (val));
get_paca()->io_sync = 1;
}
static inline unsigned long in_le64(const volatile unsigned long __iomem *addr)
static inline unsigned long __in_le64(const volatile unsigned long __iomem *addr)
{
unsigned long tmp, ret;
@@ -379,7 +368,7 @@ static inline unsigned long in_le64(const volatile unsigned long __iomem *addr)
return ret;
}
static inline unsigned long in_be64(const volatile unsigned long __iomem *addr)
static inline unsigned long __in_be64(const volatile unsigned long __iomem *addr)
{
unsigned long ret;
@@ -388,7 +377,7 @@ static inline unsigned long in_be64(const volatile unsigned long __iomem *addr)
return ret;
}
static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val)
static inline void __out_le64(volatile unsigned long __iomem *addr, unsigned long val)
{
unsigned long tmp;
@@ -406,15 +395,13 @@ static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long
get_paca()->io_sync = 1;
}
static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val)
static inline void __out_be64(volatile unsigned long __iomem *addr, unsigned long val)
{
__asm__ __volatile__("sync; std%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
get_paca()->io_sync = 1;
}
#ifndef CONFIG_PPC_ISERIES
#include <asm/eeh.h>
#endif
/**
* check_signature - find BIOS signatures
@@ -430,7 +417,6 @@ static inline int check_signature(const volatile void __iomem * io_addr,
const unsigned char *signature, int length)
{
int retval = 0;
#ifndef CONFIG_PPC_ISERIES
do {
if (readb(io_addr) != *signature)
goto out;
@@ -440,7 +426,6 @@ static inline int check_signature(const volatile void __iomem * io_addr,
} while (length);
retval = 1;
out:
#endif
return retval;
}

24
include/asm-powerpc/irq.h
View File

@@ -137,7 +137,7 @@ struct irq_map_entry {
extern struct irq_map_entry irq_map[NR_IRQS];
/***
/**
* irq_alloc_host - Allocate a new irq_host data structure
* @node: device-tree node of the interrupt controller
* @revmap_type: type of reverse mapping to use
@@ -159,14 +159,14 @@ extern struct irq_host *irq_alloc_host(unsigned int revmap_type,
irq_hw_number_t inval_irq);
/***
/**
* irq_find_host - Locates a host for a given device node
* @node: device-tree node of the interrupt controller
*/
extern struct irq_host *irq_find_host(struct device_node *node);
/***
/**
* irq_set_default_host - Set a "default" host
* @host: default host pointer
*
@@ -178,7 +178,7 @@ extern struct irq_host *irq_find_host(struct device_node *node);
extern void irq_set_default_host(struct irq_host *host);
/***
/**
* irq_set_virq_count - Set the maximum number of virt irqs
* @count: number of linux virtual irqs, capped with NR_IRQS
*
@@ -188,7 +188,7 @@ extern void irq_set_default_host(struct irq_host *host);
extern void irq_set_virq_count(unsigned int count);
/***
/**
* irq_create_mapping - Map a hardware interrupt into linux virq space
* @host: host owning this hardware interrupt or NULL for default host
* @hwirq: hardware irq number in that host space
@@ -202,13 +202,13 @@ extern unsigned int irq_create_mapping(struct irq_host *host,
irq_hw_number_t hwirq);
/***
/**
* irq_dispose_mapping - Unmap an interrupt
* @virq: linux virq number of the interrupt to unmap
*/
extern void irq_dispose_mapping(unsigned int virq);
/***
/**
* irq_find_mapping - Find a linux virq from an hw irq number.
* @host: host owning this hardware interrupt
* @hwirq: hardware irq number in that host space
@@ -221,7 +221,7 @@ extern unsigned int irq_find_mapping(struct irq_host *host,
irq_hw_number_t hwirq);
/***
/**
* irq_radix_revmap - Find a linux virq from a hw irq number.
* @host: host owning this hardware interrupt
* @hwirq: hardware irq number in that host space
@@ -232,7 +232,7 @@ extern unsigned int irq_find_mapping(struct irq_host *host,
extern unsigned int irq_radix_revmap(struct irq_host *host,
irq_hw_number_t hwirq);
/***
/**
* irq_linear_revmap - Find a linux virq from a hw irq number.
* @host: host owning this hardware interrupt
* @hwirq: hardware irq number in that host space
@@ -247,7 +247,7 @@ extern unsigned int irq_linear_revmap(struct irq_host *host,
/***
/**
* irq_alloc_virt - Allocate virtual irq numbers
* @host: host owning these new virtual irqs
* @count: number of consecutive numbers to allocate
@@ -261,7 +261,7 @@ extern unsigned int irq_alloc_virt(struct irq_host *host,
unsigned int count,
unsigned int hint);
/***
/**
* irq_free_virt - Free virtual irq numbers
* @virq: virtual irq number of the first interrupt to free
* @count: number of interrupts to free
@@ -300,7 +300,7 @@ extern unsigned int irq_of_parse_and_map(struct device_node *dev, int index);
/* -- End OF helpers -- */
/***
/**
* irq_early_init - Init irq remapping subsystem
*/
extern void irq_early_init(void);

17
include/asm-powerpc/iseries/hv_call_xm.h
View File

@@ -16,23 +16,6 @@
#define HvCallXmSetTce HvCallXm + 11
#define HvCallXmSetTces HvCallXm + 13
/*
* Structure passed to HvCallXm_getTceTableParms
*/
struct iommu_table_cb {
unsigned long itc_busno; /* Bus number for this tce table */
unsigned long itc_start; /* Will be NULL for secondary */
unsigned long itc_totalsize; /* Size (in pages) of whole table */
unsigned long itc_offset; /* Index into real tce table of the
start of our section */
unsigned long itc_size; /* Size (in pages) of our section */
unsigned long itc_index; /* Index of this tce table */
unsigned short itc_maxtables; /* Max num of tables for partition */
unsigned char itc_virtbus; /* Flag to indicate virtual bus */
unsigned char itc_slotno; /* IOA Tce Slot Index */
unsigned char itc_rsvd[4];
};
static inline void HvCallXm_getTceTableParms(u64 cb)
{
HvCall1(HvCallXmGetTceTableParms, cb);

13
include/asm-powerpc/iseries/hv_lp_config.h
View File

@@ -25,7 +25,6 @@
#include <asm/iseries/hv_call_sc.h>
#include <asm/iseries/hv_types.h>
#include <asm/iseries/it_lp_naca.h>
enum {
HvCallCfg_Cur = 0,
@@ -44,16 +43,8 @@ enum {
#define HvCallCfgGetHostingLpIndex HvCallCfg + 32
extern HvLpIndex HvLpConfig_getLpIndex_outline(void);
static inline HvLpIndex HvLpConfig_getLpIndex(void)
{
return itLpNaca.xLpIndex;
}
static inline HvLpIndex HvLpConfig_getPrimaryLpIndex(void)
{
return itLpNaca.xPrimaryLpIndex;
}
extern HvLpIndex HvLpConfig_getLpIndex(void);
extern HvLpIndex HvLpConfig_getPrimaryLpIndex(void);
static inline u64 HvLpConfig_getMsChunks(void)
{

60
include/asm-powerpc/iseries/iseries_io.h
View File

@@ -1,60 +0,0 @@
#ifndef _ASM_POWERPC_ISERIES_ISERIES_IO_H
#define _ASM_POWERPC_ISERIES_ISERIES_IO_H
#ifdef CONFIG_PPC_ISERIES
#include <linux/types.h>
/*
* Created by Allan Trautman on Thu Dec 28 2000.
*
* Remaps the io.h for the iSeries Io
* Copyright (C) 2000 Allan H Trautman, IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
* Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330,
* Boston, MA 02111-1307 USA
*
* Change Activity:
* Created December 28, 2000
* End Change Activity
*/
#ifdef CONFIG_PCI
extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress);
extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress);
extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress);
extern void iSeries_Write_Byte(u8 IoData, volatile void __iomem * IoAddress);
extern void iSeries_Write_Word(u16 IoData, volatile void __iomem * IoAddress);
extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress);
extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n);
extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source,
size_t n);
extern void iSeries_memcpy_fromio(void *dest,
const volatile void __iomem *source, size_t n);
#else
static inline u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
{
return 0xff;
}
static inline void iSeries_Write_Byte(u8 IoData,
volatile void __iomem *IoAddress)
{
}
#endif /* CONFIG_PCI */
#endif /* CONFIG_PPC_ISERIES */
#endif /* _ASM_POWERPC_ISERIES_ISERIES_IO_H */

51
include/asm-powerpc/iseries/it_exp_vpd_panel.h
View File

@@ -1,51 +0,0 @@
/*
* Copyright (C) 2002 Dave Boutcher IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H
#define _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H
/*
* This struct maps the panel information
*
* Warning:
* This data must match the architecture for the panel information
*/
#include <asm/types.h>
struct ItExtVpdPanel {
/* Definition of the Extended Vpd On Panel Data Area */
char systemSerial[8];
char mfgID[4];
char reserved1[24];
char machineType[4];
char systemID[6];
char somUniqueCnt[4];
char serialNumberCount;
char reserved2[7];
u16 bbu3;
u16 bbu2;
u16 bbu1;
char xLocationLabel[8];
u8 xRsvd1[6];
u16 xFrameId;
u8 xRsvd2[48];
};
extern struct ItExtVpdPanel xItExtVpdPanel;
#endif /* _ASM_POWERPC_ISERIES_IT_EXT_VPD_PANEL_H */

80
include/asm-powerpc/iseries/it_lp_naca.h
View File

@@ -1,80 +0,0 @@
/*
* Copyright (C) 2001 Mike Corrigan IBM Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _ASM_POWERPC_ISERIES_IT_LP_NACA_H
#define _ASM_POWERPC_ISERIES_IT_LP_NACA_H
#include <linux/types.h>
/*
* This control block contains the data that is shared between the
* hypervisor (PLIC) and the OS.
*/
struct ItLpNaca {
// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
u32 xDesc; // Eye catcher x00-x03
u16 xSize; // Size of this class x04-x05
u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
u8 xMaxIntHdlrEntries; // Number of entries in array x08-x08
u8 xPrimaryLpIndex; // LP Index of Primary x09-x09
u8 xServiceLpIndex; // LP Ind of Service Focal Pointx0A-x0A
u8 xLpIndex; // LP Index x0B-x0B
u16 xMaxLpQueues; // Number of allocated queues x0C-x0D
u16 xLpQueueOffset; // Offset to start of LP queues x0E-x0F
u8 xPirEnvironMode; // Piranha or hardware x10-x10
u8 xPirConsoleMode; // Piranha console indicator x11-x11
u8 xPirDasdMode; // Piranha dasd indicator x12-x12
u8 xRsvd1_0[5]; // Reserved for Piranha related x13-x17
u8 flags; // flags, see below x18-x1F
u8 xSpVpdFormat; // VPD areas are in CSP format ...
u8 xIntProcRatio; // Ratio of int procs to procs ...
u8 xRsvd1_2[5]; // Reserved ...
u16 xRsvd1_3; // Reserved x20-x21
u16 xPlicVrmIndex; // VRM index of PLIC x22-x23
u16 xMinSupportedSlicVrmInd;// Min supported OS VRM index x24-x25
u16 xMinCompatableSlicVrmInd;// Min compatible OS VRM index x26-x27
u64 xLoadAreaAddr; // ER address of load area x28-x2F
u32 xLoadAreaChunks; // Chunks for the load area x30-x33
u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
// doing an ASR switch on PASE
// system call.
u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
u8 xRsvd1_4[64]; // x40-x7F
// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
u8 xRsvd2_0[128]; // Reserved x00-x7F
// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
// NB: Padding required to keep xInterrruptHdlr at x300 which is required
// for v4r4 PLIC.
u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
u8 xRsvd3_0[384]; // Reserved 180-2FF
// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
// handlers
u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
};
extern struct ItLpNaca itLpNaca;
#define ITLPNACA_LPAR 0x80 /* Is LPAR installed on the system */
#define ITLPNACA_PARTITIONED 0x40 /* Is the system partitioned */
#define ITLPNACA_HWSYNCEDTBS 0x20 /* Hardware synced TBs */
#define ITLPNACA_HMTINT 0x10 /* Utilize MHT for interrupts */
#endif /* _ASM_POWERPC_ISERIES_IT_LP_NACA_H */

2
include/asm-powerpc/iseries/it_lp_queue.h
View File

@@ -27,8 +27,6 @@
#include <asm/types.h>
#include <asm/ptrace.h>
struct HvLpEvent;
#define IT_LP_MAX_QUEUES 8
#define IT_LP_NOT_USED 0 /* Queue will not be used by PLIC */

28
include/asm-powerpc/iseries/vio.h
View File

@@ -122,6 +122,34 @@ enum viorc {
viorc_openRejected = 0x0301
};
/*
* The structure of the events that flow between us and OS/400 for chario
* events. You can't mess with this unless the OS/400 side changes too.
*/
struct viocharlpevent {
struct HvLpEvent event;
u32 reserved;
u16 version;
u16 subtype_result_code;
u8 virtual_device;
u8 len;
u8 data[VIOCHAR_MAX_DATA];
};
#define VIOCHAR_WINDOW 10
enum viocharsubtype {
viocharopen = 0x0001,
viocharclose = 0x0002,
viochardata = 0x0003,
viocharack = 0x0004,
viocharconfig = 0x0005
};
enum viochar_rc {
viochar_rc_ebusy = 1
};
struct device;
extern struct device *iSeries_vio_dev;

23
include/asm-powerpc/lppaca.h
View File

@@ -27,7 +27,9 @@
//
//
//----------------------------------------------------------------------------
#include <linux/cache.h>
#include <asm/types.h>
#include <asm/mmu.h>
/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k
* alignment is sufficient to prevent this */
@@ -114,7 +116,7 @@ struct lppaca {
//=============================================================================
// CACHE_LINE_3 0x0100 - 0x007F: This line is shared with other processors
// CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors
//=============================================================================
// This is the yield_count. An "odd" value (low bit on) means that
// the processor is yielded (either because of an OS yield or a PLIC
@@ -126,12 +128,29 @@ struct lppaca {
u8 reserved6[124]; // Reserved x04-x7F
//=============================================================================
// CACHE_LINE_4-5 0x0100 - 0x01FF Contains PMC interrupt data
// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
//=============================================================================
u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF
} __attribute__((__aligned__(0x400)));
extern struct lppaca lppaca[];
/*
* SLB shadow buffer structure as defined in the PAPR. The save_area
* contains adjacent ESID and VSID pairs for each shadowed SLB. The
* ESID is stored in the lower 64bits, then the VSID.
*/
struct slb_shadow {
u32 persistent; // Number of persistent SLBs x00-x03
u32 buffer_length; // Total shadow buffer length x04-x07
u64 reserved; // Alignment x08-x0f
struct {
u64 esid;
u64 vsid;
} save_area[SLB_NUM_BOLTED]; // x10-x40
} ____cacheline_aligned;
extern struct slb_shadow slb_shadow[];
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_LPPACA_H */

3
include/asm-powerpc/paca.h
View File

@@ -23,6 +23,7 @@
register struct paca_struct *local_paca asm("r13");
#define get_paca() local_paca
#define get_lppaca() (get_paca()->lppaca_ptr)
#define get_slb_shadow() (get_paca()->slb_shadow_ptr)
struct task_struct;
@@ -99,6 +100,8 @@ struct paca_struct {
u64 user_time; /* accumulated usermode TB ticks */
u64 system_time; /* accumulated system TB ticks */
u64 startpurr; /* PURR/TB value snapshot */
struct slb_shadow *slb_shadow_ptr;
};
extern struct paca_struct paca[];

6
include/asm-powerpc/page.h
View File

@@ -55,12 +55,6 @@
#define PAGE_OFFSET ASM_CONST(CONFIG_KERNEL_START)
#define KERNELBASE (PAGE_OFFSET + PHYSICAL_START)
#ifdef CONFIG_DISCONTIGMEM
#define page_to_pfn(page) discontigmem_page_to_pfn(page)
#define pfn_to_page(pfn) discontigmem_pfn_to_page(pfn)
#define pfn_valid(pfn) discontigmem_pfn_valid(pfn)
#endif
#ifdef CONFIG_FLATMEM
#define pfn_valid(pfn) ((pfn) < max_mapnr)
#endif

11
include/asm-powerpc/ppc-pci.h
View File

@@ -68,6 +68,17 @@ struct pci_dev *pci_get_device_by_addr(unsigned long addr);
*/
void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
/**
* rtas_pci_enableo - enable IO transfers for this slot
* @pdn: pci device node
* @function: either EEH_THAW_MMIO or EEH_THAW_DMA
*
* Enable I/O transfers to this slot
*/
#define EEH_THAW_MMIO 2
#define EEH_THAW_DMA 3
int rtas_pci_enable(struct pci_dn *pdn, int function);
/**
* rtas_set_slot_reset -- unfreeze a frozen slot
*

1
include/asm-powerpc/processor.h
View File

@@ -32,6 +32,7 @@
#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */
#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
#define _CHRP_briq 0x07 /* TotalImpact's briQ */
#if defined(__KERNEL__) && defined(CONFIG_PPC32)

40
include/asm-powerpc/prom.h
View File

@@ -72,8 +72,8 @@ struct property {
};
struct device_node {
char *name;
char *type;
const char *name;
const char *type;
phandle node;
phandle linux_phandle;
char *full_name;
@@ -160,7 +160,7 @@ extern void unflatten_device_tree(void);
extern void early_init_devtree(void *);
extern int device_is_compatible(struct device_node *device, const char *);
extern int machine_is_compatible(const char *compat);
extern void *get_property(struct device_node *node, const char *name,
extern const void *get_property(struct device_node *node, const char *name,
int *lenp);
extern void print_properties(struct device_node *node);
extern int prom_n_addr_cells(struct device_node* np);
@@ -197,8 +197,8 @@ extern int release_OF_resource(struct device_node* node, int index);
*/
/* Helper to read a big number */
static inline u64 of_read_number(u32 *cell, int size)
/* Helper to read a big number; size is in cells (not bytes) */
static inline u64 of_read_number(const u32 *cell, int size)
{
u64 r = 0;
while (size--)
@@ -206,18 +206,28 @@ static inline u64 of_read_number(u32 *cell, int size)
return r;
}
/* Like of_read_number, but we want an unsigned long result */
#ifdef CONFIG_PPC32
static inline unsigned long of_read_ulong(const u32 *cell, int size)
{
return cell[size-1];
}
#else
#define of_read_ulong(cell, size) of_read_number(cell, size)
#endif
/* Translate an OF address block into a CPU physical address
*/
#define OF_BAD_ADDR ((u64)-1)
extern u64 of_translate_address(struct device_node *np, u32 *addr);
extern u64 of_translate_address(struct device_node *np, const u32 *addr);
/* Extract an address from a device, returns the region size and
* the address space flags too. The PCI version uses a BAR number
* instead of an absolute index
*/
extern u32 *of_get_address(struct device_node *dev, int index,
extern const u32 *of_get_address(struct device_node *dev, int index,
u64 *size, unsigned int *flags);
extern u32 *of_get_pci_address(struct device_node *dev, int bar_no,
extern const u32 *of_get_pci_address(struct device_node *dev, int bar_no,
u64 *size, unsigned int *flags);
/* Get an address as a resource. Note that if your address is
@@ -234,7 +244,7 @@ extern int of_pci_address_to_resource(struct device_node *dev, int bar,
/* Parse the ibm,dma-window property of an OF node into the busno, phys and
* size parameters.
*/
void of_parse_dma_window(struct device_node *dn, unsigned char *dma_window_prop,
void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
unsigned long *busno, unsigned long *phys, unsigned long *size);
extern void kdump_move_device_tree(void);
@@ -259,7 +269,7 @@ struct of_irq {
u32 specifier[OF_MAX_IRQ_SPEC]; /* Specifier copy */
};
/***
/**
* of_irq_map_init - Initialize the irq remapper
* @flags: flags defining workarounds to enable
*
@@ -272,7 +282,7 @@ struct of_irq {
extern void of_irq_map_init(unsigned int flags);
/***
/**
* of_irq_map_raw - Low level interrupt tree parsing
* @parent: the device interrupt parent
* @intspec: interrupt specifier ("interrupts" property of the device)
@@ -289,12 +299,12 @@ extern void of_irq_map_init(unsigned int flags);
*
*/
extern int of_irq_map_raw(struct device_node *parent, u32 *intspec,
u32 ointsize, u32 *addr,
extern int of_irq_map_raw(struct device_node *parent, const u32 *intspec,
u32 ointsize, const u32 *addr,
struct of_irq *out_irq);
/***
/**
* of_irq_map_one - Resolve an interrupt for a device
* @device: the device whose interrupt is to be resolved
* @index: index of the interrupt to resolve
@@ -307,7 +317,7 @@ extern int of_irq_map_raw(struct device_node *parent, u32 *intspec,
extern int of_irq_map_one(struct device_node *device, int index,
struct of_irq *out_irq);
/***
/**
* of_irq_map_pci - Resolve the interrupt for a PCI device
* @pdev: the device whose interrupt is to be resolved
* @out_irq: structure of_irq filled by this function

4
include/asm-powerpc/ptrace.h
View File

@@ -215,12 +215,10 @@ do { \
#define PTRACE_GETVRREGS 18
#define PTRACE_SETVRREGS 19
#ifndef __powerpc64__
/* Get/set all the upper 32-bits of the SPE registers, accumulator, and
* spefscr, in one go */
#define PTRACE_GETEVRREGS 20
#define PTRACE_SETEVRREGS 21
#endif /* __powerpc64__ */
/*
* Get or set a debug register. The first 16 are DABR registers and the
@@ -235,7 +233,6 @@ do { \
#define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
#define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
#ifdef __powerpc64__
/* Calls to trace a 64bit program from a 32bit program */
#define PPC_PTRACE_PEEKTEXT_3264 0x95
#define PPC_PTRACE_PEEKDATA_3264 0x94
@@ -243,6 +240,5 @@ do { \
#define PPC_PTRACE_POKEDATA_3264 0x92
#define PPC_PTRACE_PEEKUSR_3264 0x91
#define PPC_PTRACE_POKEUSR_3264 0x90
#endif /* __powerpc64__ */
#endif /* _ASM_POWERPC_PTRACE_H */

1
include/asm-powerpc/reg.h
View File

@@ -592,6 +592,7 @@
#define PV_630p 0x0041
#define PV_970MP 0x0044
#define PV_BE 0x0070
#define PV_PA6T 0x0090
/*
* Number of entries in the SLB. If this ever changes we should handle

16
include/asm-powerpc/rtas.h
View File

@@ -230,5 +230,21 @@ extern unsigned long rtas_rmo_buf;
#define GLOBAL_INTERRUPT_QUEUE 9005
/**
* rtas_config_addr - Format a busno, devfn and reg for RTAS.
* @busno: The bus number.
* @devfn: The device and function number as encoded by PCI_DEVFN().
* @reg: The register number.
*
* This function encodes the given busno, devfn and register number as
* required for RTAS calls that take a "config_addr" parameter.
* See PAPR requirement 7.3.4-1 for more info.
*/
static inline u32 rtas_config_addr(int busno, int devfn, int reg)
{
return ((reg & 0xf00) << 20) | ((busno & 0xff) << 16) |
(devfn << 8) | (reg & 0xff);
}
#endif /* __KERNEL__ */
#endif /* _POWERPC_RTAS_H */

2
include/asm-powerpc/smu.h
View File

@@ -517,7 +517,7 @@ struct smu_sdbp_cpupiddata {
* This returns the pointer to an SMU "sdb" partition data or NULL
* if not found. The data format is described below
*/
extern struct smu_sdbp_header *smu_get_sdb_partition(int id,
extern const struct smu_sdbp_header *smu_get_sdb_partition(int id,
unsigned int *size);
/* Get "sdb" partition data from an SMU satellite */

2
include/asm-powerpc/spu.h
View File

@@ -106,7 +106,7 @@ struct spu_context;
struct spu_runqueue;
struct spu {
char *name;
const char *name;
unsigned long local_store_phys;
u8 *local_store;
unsigned long problem_phys;

5
include/asm-powerpc/system.h
View File

@@ -177,11 +177,6 @@ extern u32 booke_wdt_enabled;
extern u32 booke_wdt_period;
#endif /* CONFIG_BOOKE_WDT */
/* EBCDIC -> ASCII conversion for [0-9A-Z] on iSeries */
extern unsigned char e2a(unsigned char);
extern unsigned char* strne2a(unsigned char *dest,
const unsigned char *src, size_t n);
struct device_node;
extern void note_scsi_host(struct device_node *, void *);

4
include/asm-powerpc/vio.h
View File

@@ -46,8 +46,8 @@ struct iommu_table;
*/
struct vio_dev {
struct iommu_table *iommu_table; /* vio_map_* uses this */
char *name;
char *type;
const char *name;
const char *type;
uint32_t unit_address;
unsigned int irq;
struct device dev;

26
include/asm-ppc/io.h
View File

@@ -327,26 +327,12 @@ __do_out_asm(outl, "stwbrx")
#define inl_p(port) inl((port))
#define outl_p(val, port) outl((val), (port))
extern void _insb(volatile u8 __iomem *port, void *buf, int ns);
extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns);
extern void _insw(volatile u16 __iomem *port, void *buf, int ns);
extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns);
extern void _insl(volatile u32 __iomem *port, void *buf, int nl);
extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl);
extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns);
extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns);
extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl);
extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl);
/*
* The *_ns versions below don't do byte-swapping.
* Neither do the standard versions now, these are just here
* for older code.
*/
#define insw_ns(port, buf, ns) _insw_ns((port)+___IO_BASE, (buf), (ns))
#define outsw_ns(port, buf, ns) _outsw_ns((port)+___IO_BASE, (buf), (ns))
#define insl_ns(port, buf, nl) _insl_ns((port)+___IO_BASE, (buf), (nl))
#define outsl_ns(port, buf, nl) _outsl_ns((port)+___IO_BASE, (buf), (nl))
extern void _insb(volatile u8 __iomem *port, void *buf, long count);
extern void _outsb(volatile u8 __iomem *port, const void *buf, long count);
extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count);
extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count);
extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count);
extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count);
#define IO_SPACE_LIMIT ~0

4
include/asm-ppc/mpc8260_pci9.h
View File

@@ -30,8 +30,6 @@
#undef inb
#undef inw
#undef inl
#undef insw_ns
#undef insl_ns
#undef memcpy_fromio
extern int readb(volatile unsigned char *addr);
@@ -43,8 +41,6 @@ extern void insl(unsigned port, void *buf, int nl);
extern int inb(unsigned port);
extern int inw(unsigned port);
extern unsigned inl(unsigned port);
extern void insw_ns(unsigned port, void *buf, int ns);
extern void insl_ns(unsigned port, void *buf, int nl);
extern void *memcpy_fromio(void *dest, unsigned long src, size_t count);
#endif /* !__CONFIG_8260_PCI9_DEFS */

16
include/asm-ppc/reg_booke.h
View File

@@ -300,14 +300,14 @@ do { \
#define DBSR_IC 0x80000000 /* Instruction Completion */
#define DBSR_BT 0x40000000 /* Branch taken */
#define DBSR_TIE 0x10000000 /* Trap Instruction debug Event */
#define DBSR_IAC1 0x00800000 /* Instruction Address Compare 1 Event */
#define DBSR_IAC2 0x00400000 /* Instruction Address Compare 2 Event */
#define DBSR_IAC3 0x00200000 /* Instruction Address Compare 3 Event */
#define DBSR_IAC4 0x00100000 /* Instruction Address Compare 4 Event */
#define DBSR_DAC1R 0x00080000 /* Data Address Compare 1 Read Event */
#define DBSR_DAC1W 0x00040000 /* Data Address Compare 1 Write Event */
#define DBSR_DAC2R 0x00020000 /* Data Address Compare 2 Read Event */
#define DBSR_DAC2W 0x00010000 /* Data Address Compare 2 Write Event */
#define DBSR_IAC1 0x04000000 /* Instruction Address Compare 1 Event */
#define DBSR_IAC2 0x02000000 /* Instruction Address Compare 2 Event */
#define DBSR_IAC3 0x00080000 /* Instruction Address Compare 3 Event */
#define DBSR_IAC4 0x00040000 /* Instruction Address Compare 4 Event */
#define DBSR_DAC1R 0x01000000 /* Data Address Compare 1 Read Event */
#define DBSR_DAC1W 0x00800000 /* Data Address Compare 1 Write Event */
#define DBSR_DAC2R 0x00400000 /* Data Address Compare 2 Read Event */
#define DBSR_DAC2W 0x00200000 /* Data Address Compare 2 Write Event */
#endif
/* Bit definitions related to the ESR. */