ath10k: split ce irq/handler setup

It doesn't make much sense to overwrite send_cb
and recv_cb callbacks over and over again whenever
transport starts. Just make sure to unmask copy
engine interrupts when starting.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
Michal Kazior 2014-08-22 14:23:32 +02:00 committed by Kalle Valo
parent 403d627be9
commit 145cc1214a
3 changed files with 21 additions and 68 deletions

View File

@ -769,11 +769,11 @@ void ath10k_ce_per_engine_service_any(struct ath10k *ar)
* *
* Called with ce_lock held. * Called with ce_lock held.
*/ */
static void ath10k_ce_per_engine_handler_adjust(struct ath10k_ce_pipe *ce_state, static void ath10k_ce_per_engine_handler_adjust(struct ath10k_ce_pipe *ce_state)
int disable_copy_compl_intr)
{ {
u32 ctrl_addr = ce_state->ctrl_addr; u32 ctrl_addr = ce_state->ctrl_addr;
struct ath10k *ar = ce_state->ar; struct ath10k *ar = ce_state->ar;
bool disable_copy_compl_intr = ce_state->attr_flags & CE_ATTR_DIS_INTR;
if ((!disable_copy_compl_intr) && if ((!disable_copy_compl_intr) &&
(ce_state->send_cb || ce_state->recv_cb)) (ce_state->send_cb || ce_state->recv_cb))
@ -799,29 +799,13 @@ int ath10k_ce_disable_interrupts(struct ath10k *ar)
return 0; return 0;
} }
void ath10k_ce_send_cb_register(struct ath10k_ce_pipe *ce_state, void ath10k_ce_enable_interrupts(struct ath10k *ar)
void (*send_cb)(struct ath10k_ce_pipe *),
int disable_interrupts)
{ {
struct ath10k *ar = ce_state->ar;
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
int ce_id;
spin_lock_bh(&ar_pci->ce_lock); for (ce_id = 0; ce_id < CE_COUNT; ce_id++)
ce_state->send_cb = send_cb; ath10k_ce_per_engine_handler_adjust(&ar_pci->ce_states[ce_id]);
ath10k_ce_per_engine_handler_adjust(ce_state, disable_interrupts);
spin_unlock_bh(&ar_pci->ce_lock);
}
void ath10k_ce_recv_cb_register(struct ath10k_ce_pipe *ce_state,
void (*recv_cb)(struct ath10k_ce_pipe *))
{
struct ath10k *ar = ce_state->ar;
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
spin_lock_bh(&ar_pci->ce_lock);
ce_state->recv_cb = recv_cb;
ath10k_ce_per_engine_handler_adjust(ce_state, 0);
spin_unlock_bh(&ar_pci->ce_lock);
} }
static int ath10k_ce_init_src_ring(struct ath10k *ar, static int ath10k_ce_init_src_ring(struct ath10k *ar,
@ -1023,7 +1007,9 @@ ath10k_ce_alloc_dest_ring(struct ath10k *ar, unsigned int ce_id,
* initialized by software/firmware. * initialized by software/firmware.
*/ */
int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id, int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id,
const struct ce_attr *attr) const struct ce_attr *attr,
void (*send_cb)(struct ath10k_ce_pipe *),
void (*recv_cb)(struct ath10k_ce_pipe *))
{ {
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id]; struct ath10k_ce_pipe *ce_state = &ar_pci->ce_states[ce_id];
@ -1046,6 +1032,10 @@ int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id,
ce_state->ctrl_addr = ath10k_ce_base_address(ce_id); ce_state->ctrl_addr = ath10k_ce_base_address(ce_id);
ce_state->attr_flags = attr->flags; ce_state->attr_flags = attr->flags;
ce_state->src_sz_max = attr->src_sz_max; ce_state->src_sz_max = attr->src_sz_max;
if (attr->src_nentries)
ce_state->send_cb = send_cb;
if (attr->dest_nentries)
ce_state->recv_cb = recv_cb;
spin_unlock_bh(&ar_pci->ce_lock); spin_unlock_bh(&ar_pci->ce_lock);
if (attr->src_nentries) { if (attr->src_nentries) {

View File

@ -162,10 +162,6 @@ int ath10k_ce_send_nolock(struct ath10k_ce_pipe *ce_state,
void __ath10k_ce_send_revert(struct ath10k_ce_pipe *pipe); void __ath10k_ce_send_revert(struct ath10k_ce_pipe *pipe);
void ath10k_ce_send_cb_register(struct ath10k_ce_pipe *ce_state,
void (*send_cb)(struct ath10k_ce_pipe *),
int disable_interrupts);
int ath10k_ce_num_free_src_entries(struct ath10k_ce_pipe *pipe); int ath10k_ce_num_free_src_entries(struct ath10k_ce_pipe *pipe);
/*==================Recv=======================*/ /*==================Recv=======================*/
@ -184,9 +180,6 @@ int ath10k_ce_recv_buf_enqueue(struct ath10k_ce_pipe *ce_state,
void *per_transfer_recv_context, void *per_transfer_recv_context,
u32 buffer); u32 buffer);
void ath10k_ce_recv_cb_register(struct ath10k_ce_pipe *ce_state,
void (*recv_cb)(struct ath10k_ce_pipe *));
/* recv flags */ /* recv flags */
/* Data is byte-swapped */ /* Data is byte-swapped */
#define CE_RECV_FLAG_SWAPPED 1 #define CE_RECV_FLAG_SWAPPED 1
@ -214,7 +207,9 @@ int ath10k_ce_completed_send_next(struct ath10k_ce_pipe *ce_state,
/*==================CE Engine Initialization=======================*/ /*==================CE Engine Initialization=======================*/
int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id, int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id,
const struct ce_attr *attr); const struct ce_attr *attr,
void (*send_cb)(struct ath10k_ce_pipe *),
void (*recv_cb)(struct ath10k_ce_pipe *));
void ath10k_ce_deinit_pipe(struct ath10k *ar, unsigned int ce_id); void ath10k_ce_deinit_pipe(struct ath10k *ar, unsigned int ce_id);
int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id, int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id,
const struct ce_attr *attr); const struct ce_attr *attr);
@ -245,6 +240,7 @@ int ath10k_ce_cancel_send_next(struct ath10k_ce_pipe *ce_state,
void ath10k_ce_per_engine_service_any(struct ath10k *ar); void ath10k_ce_per_engine_service_any(struct ath10k *ar);
void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id); void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id);
int ath10k_ce_disable_interrupts(struct ath10k *ar); int ath10k_ce_disable_interrupts(struct ath10k *ar);
void ath10k_ce_enable_interrupts(struct ath10k *ar);
/* ce_attr.flags values */ /* ce_attr.flags values */
/* Use NonSnooping PCIe accesses? */ /* Use NonSnooping PCIe accesses? */

View File

@ -941,37 +941,6 @@ static void ath10k_pci_hif_set_callbacks(struct ath10k *ar,
sizeof(ar_pci->msg_callbacks_current)); sizeof(ar_pci->msg_callbacks_current));
} }
static int ath10k_pci_setup_ce_irq(struct ath10k *ar)
{
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
const struct ce_attr *attr;
struct ath10k_pci_pipe *pipe_info;
int pipe_num, disable_interrupts;
for (pipe_num = 0; pipe_num < CE_COUNT; pipe_num++) {
pipe_info = &ar_pci->pipe_info[pipe_num];
/* Handle Diagnostic CE specially */
if (pipe_info->ce_hdl == ar_pci->ce_diag)
continue;
attr = &host_ce_config_wlan[pipe_num];
if (attr->src_nentries) {
disable_interrupts = attr->flags & CE_ATTR_DIS_INTR;
ath10k_ce_send_cb_register(pipe_info->ce_hdl,
ath10k_pci_ce_send_done,
disable_interrupts);
}
if (attr->dest_nentries)
ath10k_ce_recv_cb_register(pipe_info->ce_hdl,
ath10k_pci_ce_recv_data);
}
return 0;
}
static void ath10k_pci_kill_tasklet(struct ath10k *ar) static void ath10k_pci_kill_tasklet(struct ath10k *ar)
{ {
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar); struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
@ -1169,11 +1138,7 @@ static int ath10k_pci_hif_start(struct ath10k *ar)
goto err_early_irq; goto err_early_irq;
} }
ret = ath10k_pci_setup_ce_irq(ar); ath10k_ce_enable_interrupts(ar);
if (ret) {
ath10k_warn("failed to setup CE interrupts: %d\n", ret);
goto err_stop;
}
/* Post buffers once to start things off. */ /* Post buffers once to start things off. */
ret = ath10k_pci_post_rx(ar); ret = ath10k_pci_post_rx(ar);
@ -1786,7 +1751,9 @@ static int ath10k_pci_ce_init(struct ath10k *ar)
pipe_info->hif_ce_state = ar; pipe_info->hif_ce_state = ar;
attr = &host_ce_config_wlan[pipe_num]; attr = &host_ce_config_wlan[pipe_num];
ret = ath10k_ce_init_pipe(ar, pipe_num, attr); ret = ath10k_ce_init_pipe(ar, pipe_num, attr,
ath10k_pci_ce_send_done,
ath10k_pci_ce_recv_data);
if (ret) { if (ret) {
ath10k_err("failed to initialize copy engine pipe %d: %d\n", ath10k_err("failed to initialize copy engine pipe %d: %d\n",
pipe_num, ret); pipe_num, ret);