ixgbe: Check config reads for removal
Configuration space reads should also be checked for removal. So add some checks related to config space accesses. v2: * Fixed indent Signed-off-by: Mark Rustad <mark.d.rustad@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1,7 +1,7 @@
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/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2013 Intel Corporation.
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Copyright(c) 1999 - 2014 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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@ -61,6 +61,9 @@ static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw)
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u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR);
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u16 pcie_devctl2;
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if (ixgbe_removed(hw->hw_addr))
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return;
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/* only take action if timeout value is defaulted to 0 */
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if (gcr & IXGBE_GCR_CMPL_TMOUT_MASK)
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goto out;
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@ -79,8 +82,9 @@ static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw)
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* directly in order to set the completion timeout value for
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* 16ms to 55ms
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*/
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pci_read_config_word(adapter->pdev,
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IXGBE_PCI_DEVICE_CONTROL2, &pcie_devctl2);
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pcie_devctl2 = ixgbe_read_pci_cfg_word(hw, IXGBE_PCI_DEVICE_CONTROL2);
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if (ixgbe_removed(hw->hw_addr))
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return;
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pcie_devctl2 |= IXGBE_PCI_DEVICE_CONTROL2_16ms;
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pci_write_config_word(adapter->pdev,
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IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2);
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@ -1,7 +1,7 @@
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/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2013 Intel Corporation.
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Copyright(c) 1999 - 2014 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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@ -2487,7 +2487,6 @@ static u32 ixgbe_pcie_timeout_poll(struct ixgbe_hw *hw)
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**/
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static s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)
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{
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struct ixgbe_adapter *adapter = hw->back;
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s32 status = 0;
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u32 i, poll;
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u16 value;
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@ -2496,7 +2495,8 @@ static s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)
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IXGBE_WRITE_REG(hw, IXGBE_CTRL, IXGBE_CTRL_GIO_DIS);
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/* Exit if master requests are blocked */
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if (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO))
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if (!(IXGBE_READ_REG(hw, IXGBE_STATUS) & IXGBE_STATUS_GIO) ||
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ixgbe_removed(hw->hw_addr))
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goto out;
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/* Poll for master request bit to clear */
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@ -2524,8 +2524,9 @@ static s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw)
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poll = ixgbe_pcie_timeout_poll(hw);
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for (i = 0; i < poll; i++) {
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udelay(100);
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pci_read_config_word(adapter->pdev, IXGBE_PCI_DEVICE_STATUS,
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&value);
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value = ixgbe_read_pci_cfg_word(hw, IXGBE_PCI_DEVICE_STATUS);
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if (ixgbe_removed(hw->hw_addr))
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goto out;
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if (!(value & IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING))
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goto out;
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}
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@ -2867,7 +2868,6 @@ san_mac_addr_clr:
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**/
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u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)
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{
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struct ixgbe_adapter *adapter = hw->back;
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u16 msix_count = 1;
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u16 max_msix_count;
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u16 pcie_offset;
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@ -2886,7 +2886,9 @@ u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw)
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return msix_count;
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}
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pci_read_config_word(adapter->pdev, pcie_offset, &msix_count);
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msix_count = ixgbe_read_pci_cfg_word(hw, pcie_offset);
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if (ixgbe_removed(hw->hw_addr))
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msix_count = 0;
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msix_count &= IXGBE_PCIE_MSIX_TBL_SZ_MASK;
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/* MSI-X count is zero-based in HW */
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@ -1,7 +1,7 @@
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/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2013 Intel Corporation.
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Copyright(c) 1999 - 2014 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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@ -128,6 +128,10 @@ s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
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s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
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#define IXGBE_FAILED_READ_REG 0xffffffffU
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#define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU
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#define IXGBE_FAILED_READ_CFG_WORD 0xffffU
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u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg);
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static inline bool ixgbe_removed(void __iomem *addr)
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{
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@ -151,6 +151,8 @@ MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VERSION);
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static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
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static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
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u32 reg, u16 *value)
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{
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@ -169,6 +171,9 @@ static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
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return -1;
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pcie_capability_read_word(parent_dev, reg, value);
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if (*value == IXGBE_FAILED_READ_CFG_WORD &&
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ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
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return -1;
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return 0;
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}
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@ -313,6 +318,48 @@ void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
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ixgbe_remove_adapter(hw);
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}
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static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
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{
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u16 value;
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pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
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if (value == IXGBE_FAILED_READ_CFG_WORD) {
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ixgbe_remove_adapter(hw);
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return true;
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}
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return false;
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}
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u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
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{
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struct ixgbe_adapter *adapter = hw->back;
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u16 value;
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if (ixgbe_removed(hw->hw_addr))
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return IXGBE_FAILED_READ_CFG_WORD;
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pci_read_config_word(adapter->pdev, reg, &value);
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if (value == IXGBE_FAILED_READ_CFG_WORD &&
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ixgbe_check_cfg_remove(hw, adapter->pdev))
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return IXGBE_FAILED_READ_CFG_WORD;
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return value;
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}
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#ifdef CONFIG_PCI_IOV
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static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
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{
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struct ixgbe_adapter *adapter = hw->back;
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u32 value;
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if (ixgbe_removed(hw->hw_addr))
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return IXGBE_FAILED_READ_CFG_DWORD;
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pci_read_config_dword(adapter->pdev, reg, &value);
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if (value == IXGBE_FAILED_READ_CFG_DWORD &&
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ixgbe_check_cfg_remove(hw, adapter->pdev))
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return IXGBE_FAILED_READ_CFG_DWORD;
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return value;
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}
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#endif /* CONFIG_PCI_IOV */
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static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
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{
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BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
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@ -8339,6 +8386,7 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
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struct net_device *netdev = adapter->netdev;
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#ifdef CONFIG_PCI_IOV
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struct ixgbe_hw *hw = &adapter->hw;
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struct pci_dev *bdev, *vfdev;
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u32 dw0, dw1, dw2, dw3;
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int vf, pos;
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@ -8359,10 +8407,12 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
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if (!pos)
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goto skip_bad_vf_detection;
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pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
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pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
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pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
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pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
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dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
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dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
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dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
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dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
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if (ixgbe_removed(hw->hw_addr))
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goto skip_bad_vf_detection;
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req_id = dw1 >> 16;
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/* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
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