forked from Minki/linux
mlxsw: spectrum_buffers: Keep mlxsw_sp_sb_mm in sb_vals
The SBMM register configures the shared buffer quota for MC packets according to Switch-Priority. The default configuration depends on the chip type. Therefore keep the table and length in struct mlxsw_sp_sb_vals. Redirect the references from the global definitions to the fields. Signed-off-by: Petr Machata <petrm@mellanox.com> Signed-off-by: Ido Schimmel <idosch@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -37,6 +37,12 @@ struct mlxsw_sp_sb_pm {
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struct mlxsw_cp_sb_occ occ;
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};
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struct mlxsw_sp_sb_mm {
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u32 min_buff;
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u32 max_buff;
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u16 pool_index;
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};
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struct mlxsw_sp_sb_pool_des {
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enum mlxsw_reg_sbxx_dir dir;
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u8 pool;
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@ -76,9 +82,11 @@ struct mlxsw_sp_sb_vals {
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const struct mlxsw_sp_sb_pool_des *pool_dess;
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const struct mlxsw_sp_sb_pm *pms;
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const struct mlxsw_sp_sb_pr *prs;
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const struct mlxsw_sp_sb_mm *mms;
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const struct mlxsw_sp_sb_cm *cms_ingress;
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const struct mlxsw_sp_sb_cm *cms_egress;
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const struct mlxsw_sp_sb_cm *cms_cpu;
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unsigned int mms_count;
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unsigned int cms_ingress_count;
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unsigned int cms_egress_count;
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unsigned int cms_cpu_count;
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@ -604,12 +612,6 @@ static int mlxsw_sp_port_sb_pms_init(struct mlxsw_sp_port *mlxsw_sp_port)
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return 0;
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}
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struct mlxsw_sp_sb_mm {
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u32 min_buff;
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u32 max_buff;
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u16 pool_index;
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};
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#define MLXSW_SP_SB_MM(_min_buff, _max_buff, _pool) \
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{ \
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.min_buff = _min_buff, \
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@ -635,20 +637,18 @@ static const struct mlxsw_sp_sb_mm mlxsw_sp_sb_mms[] = {
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MLXSW_SP_SB_MM(0, 6, 4),
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};
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#define MLXSW_SP_SB_MMS_LEN ARRAY_SIZE(mlxsw_sp_sb_mms)
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static int mlxsw_sp_sb_mms_init(struct mlxsw_sp *mlxsw_sp)
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{
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char sbmm_pl[MLXSW_REG_SBMM_LEN];
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int i;
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int err;
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for (i = 0; i < MLXSW_SP_SB_MMS_LEN; i++) {
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for (i = 0; i < mlxsw_sp->sb_vals->mms_count; i++) {
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const struct mlxsw_sp_sb_pool_des *des;
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const struct mlxsw_sp_sb_mm *mc;
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u32 min_buff;
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mc = &mlxsw_sp_sb_mms[i];
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mc = &mlxsw_sp->sb_vals->mms[i];
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des = &mlxsw_sp->sb_vals->pool_dess[mc->pool_index];
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/* All pools used by sb_mm's are initialized using dynamic
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* thresholds, therefore 'max_buff' isn't specified in cells.
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@ -684,9 +684,11 @@ const struct mlxsw_sp_sb_vals mlxsw_sp1_sb_vals = {
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.pool_dess = mlxsw_sp_sb_pool_dess,
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.pms = mlxsw_sp_sb_pms,
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.prs = mlxsw_sp_sb_prs,
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.mms = mlxsw_sp_sb_mms,
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.cms_ingress = mlxsw_sp_sb_cms_ingress,
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.cms_egress = mlxsw_sp_sb_cms_egress,
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.cms_cpu = mlxsw_sp_cpu_port_sb_cms,
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.mms_count = ARRAY_SIZE(mlxsw_sp_sb_mms),
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.cms_ingress_count = ARRAY_SIZE(mlxsw_sp_sb_cms_ingress),
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.cms_egress_count = ARRAY_SIZE(mlxsw_sp_sb_cms_egress),
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.cms_cpu_count = ARRAY_SIZE(mlxsw_sp_cpu_port_sb_cms),
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@ -697,9 +699,11 @@ const struct mlxsw_sp_sb_vals mlxsw_sp2_sb_vals = {
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.pool_dess = mlxsw_sp_sb_pool_dess,
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.pms = mlxsw_sp_sb_pms,
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.prs = mlxsw_sp_sb_prs,
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.mms = mlxsw_sp_sb_mms,
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.cms_ingress = mlxsw_sp_sb_cms_ingress,
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.cms_egress = mlxsw_sp_sb_cms_egress,
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.cms_cpu = mlxsw_sp_cpu_port_sb_cms,
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.mms_count = ARRAY_SIZE(mlxsw_sp_sb_mms),
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.cms_ingress_count = ARRAY_SIZE(mlxsw_sp_sb_cms_ingress),
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.cms_egress_count = ARRAY_SIZE(mlxsw_sp_sb_cms_egress),
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.cms_cpu_count = ARRAY_SIZE(mlxsw_sp_cpu_port_sb_cms),
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