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drm/amd/display: Remove reliance on pipe indexing

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[Why]
In certain instances, there was a reliance on pipe indexing being accurate. However, this
assumption fails with harvesting of pipes 1 or 2, which can occur in production B6 parts.
HW hang would occur as a result.

[How]
Use hubp index for mpcc, and do mpc_init for all theoretical pipes (including disabled ones).

Signed-off-by: Noah Abradjian <noah.abradjian@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Noah Abradjian 2019-11-29 13:48:36 -05:00 committed by Alex Deucher
parent 32ff3217d6
commit 1380c1bf5b
2 changed files with 3 additions and 2 deletions
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3
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@ -1163,7 +1163,8 @@ void dcn10_init_pipes(struct dc *dc, struct dc_state *context)
}
}
for (i = 0; i < dc->res_pool->pipe_count; i++) {
/* num_opp will be equal to number of mpcc */
for (i = 0; i < dc->res_pool->res_cap->num_opp; i++) {
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
/* Cannot reset the MPC mux if seamless boot */

2
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
View File

@ -1356,7 +1356,7 @@ static void dcn20_update_dchubp_dpp(
|| plane_state->update_flags.bits.global_alpha_change
|| plane_state->update_flags.bits.per_pixel_alpha_change) {
// MPCC inst is equal to pipe index in practice
int mpcc_inst = pipe_ctx->pipe_idx;
int mpcc_inst = hubp->inst;
int opp_inst;
int opp_count = dc->res_pool->pipe_count;