forked from Minki/linux
spi/pl022: minor kerneldoc updates
Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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@ -329,15 +329,16 @@ struct vendor_data {
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/**
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* struct pl022 - This is the private SSP driver data structure
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* @adev: AMBA device model hookup
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* @vendor: Vendor data for the IP block
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* @phybase: The physical memory where the SSP device resides
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* @virtbase: The virtual memory where the SSP is mapped
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* @vendor: vendor data for the IP block
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* @phybase: the physical memory where the SSP device resides
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* @virtbase: the virtual memory where the SSP is mapped
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* @clk: outgoing clock "SPICLK" for the SPI bus
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* @master: SPI framework hookup
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* @master_info: controller-specific data from machine setup
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* @regs: SSP controller register's virtual address
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* @pump_messages: Work struct for scheduling work to the workqueue
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* @lock: spinlock to syncronise access to driver data
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* @workqueue: a workqueue on which any spi_message request is queued
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* @pump_messages: work struct for scheduling work to the workqueue
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* @queue_lock: spinlock to syncronise access to message queue
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* @queue: message queue
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* @busy: workqueue is busy
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* @running: workqueue is running
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* @pump_transfers: Tasklet used in Interrupt Transfer mode
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@ -348,8 +349,14 @@ struct vendor_data {
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* @tx_end: end position in TX buffer to be read
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* @rx: current position in RX buffer to be written
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* @rx_end: end position in RX buffer to be written
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* @readingtype: the type of read currently going on
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* @writingtype: the type or write currently going on
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* @read: the type of read currently going on
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* @write: the type of write currently going on
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* @exp_fifo_level: expected FIFO level
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* @dma_rx_channel: optional channel for RX DMA
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* @dma_tx_channel: optional channel for TX DMA
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* @sgt_rx: scattertable for the RX transfer
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* @sgt_tx: scattertable for the TX transfer
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* @dummypage: a dummy page used for driving data on the bus with DMA
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*/
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struct pl022 {
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struct amba_device *adev;
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@ -397,8 +404,8 @@ struct pl022 {
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* @cpsr: Value of Clock prescale register
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* @n_bytes: how many bytes(power of 2) reqd for a given data width of client
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* @enable_dma: Whether to enable DMA or not
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* @write: function ptr to be used to write when doing xfer for this chip
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* @read: function ptr to be used to read when doing xfer for this chip
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* @write: function ptr to be used to write when doing xfer for this chip
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* @cs_control: chip select callback provided by chip
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* @xfer_type: polling/interrupt/DMA
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*
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