forked from Minki/linux
clk: at91: add at91sam9g45 pmc driver
Add a driver for the PMC clocks of the at91sam9g45 family. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lkml.kernel.org/r/20200117210529.17490-1-alexandre.belloni@bootlin.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Alexandre Belloni
Stephen Boyd
parent
9962fb0d19
commit
12dc8d3be9
@ -16,6 +16,7 @@ obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o
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obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o
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obj-$(CONFIG_HAVE_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o
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obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9rl.o at91sam9x5.o
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obj-$(CONFIG_SOC_AT91SAM9) += at91sam9g45.o
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obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o
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obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
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obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o
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220
drivers/clk/at91/at91sam9g45.c
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220
drivers/clk/at91/at91sam9g45.c
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@ -0,0 +1,220 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/clk-provider.h>
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#include <linux/mfd/syscon.h>
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#include <linux/slab.h>
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#include <dt-bindings/clock/at91.h>
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#include "pmc.h"
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static const struct clk_master_characteristics mck_characteristics = {
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.output = { .min = 0, .max = 133333333 },
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.divisors = { 1, 2, 4, 3 },
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};
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static u8 plla_out[] = { 0, 1, 2, 3, 0, 1, 2, 3 };
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static u16 plla_icpll[] = { 0, 0, 0, 0, 1, 1, 1, 1 };
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static const struct clk_range plla_outputs[] = {
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{ .min = 745000000, .max = 800000000 },
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{ .min = 695000000, .max = 750000000 },
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{ .min = 645000000, .max = 700000000 },
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{ .min = 595000000, .max = 650000000 },
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{ .min = 545000000, .max = 600000000 },
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{ .min = 495000000, .max = 555000000 },
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{ .min = 445000000, .max = 500000000 },
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{ .min = 400000000, .max = 450000000 },
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};
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static const struct clk_pll_characteristics plla_characteristics = {
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.input = { .min = 2000000, .max = 32000000 },
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.num_output = ARRAY_SIZE(plla_outputs),
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.output = plla_outputs,
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.icpll = plla_icpll,
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.out = plla_out,
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};
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static const struct {
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char *n;
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char *p;
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u8 id;
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} at91sam9g45_systemck[] = {
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{ .n = "ddrck", .p = "masterck", .id = 2 },
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{ .n = "uhpck", .p = "usbck", .id = 6 },
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{ .n = "pck0", .p = "prog0", .id = 8 },
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{ .n = "pck1", .p = "prog1", .id = 9 },
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};
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static const struct clk_pcr_layout at91sam9g45_pcr_layout = {
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.offset = 0x10c,
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.cmd = BIT(12),
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.pid_mask = GENMASK(5, 0),
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.div_mask = GENMASK(17, 16),
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};
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struct pck {
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char *n;
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u8 id;
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};
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static const struct pck at91sam9g45_periphck[] = {
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{ .n = "pioA_clk", .id = 2, },
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{ .n = "pioB_clk", .id = 3, },
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{ .n = "pioC_clk", .id = 4, },
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{ .n = "pioDE_clk", .id = 5, },
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{ .n = "trng_clk", .id = 6, },
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{ .n = "usart0_clk", .id = 7, },
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{ .n = "usart1_clk", .id = 8, },
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{ .n = "usart2_clk", .id = 9, },
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{ .n = "usart3_clk", .id = 10, },
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{ .n = "mci0_clk", .id = 11, },
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{ .n = "twi0_clk", .id = 12, },
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{ .n = "twi1_clk", .id = 13, },
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{ .n = "spi0_clk", .id = 14, },
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{ .n = "spi1_clk", .id = 15, },
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{ .n = "ssc0_clk", .id = 16, },
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{ .n = "ssc1_clk", .id = 17, },
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{ .n = "tcb0_clk", .id = 18, },
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{ .n = "pwm_clk", .id = 19, },
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{ .n = "adc_clk", .id = 20, },
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{ .n = "dma0_clk", .id = 21, },
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{ .n = "uhphs_clk", .id = 22, },
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{ .n = "lcd_clk", .id = 23, },
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{ .n = "ac97_clk", .id = 24, },
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{ .n = "macb0_clk", .id = 25, },
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{ .n = "isi_clk", .id = 26, },
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{ .n = "udphs_clk", .id = 27, },
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{ .n = "aestdessha_clk", .id = 28, },
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{ .n = "mci1_clk", .id = 29, },
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{ .n = "vdec_clk", .id = 30, },
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};
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static void __init at91sam9g45_pmc_setup(struct device_node *np)
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{
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const char *slck_name, *mainxtal_name;
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struct pmc_data *at91sam9g45_pmc;
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const char *parent_names[6];
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struct regmap *regmap;
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struct clk_hw *hw;
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int i;
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bool bypass;
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i = of_property_match_string(np, "clock-names", "slow_clk");
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if (i < 0)
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return;
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slck_name = of_clk_get_parent_name(np, i);
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i = of_property_match_string(np, "clock-names", "main_xtal");
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if (i < 0)
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return;
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mainxtal_name = of_clk_get_parent_name(np, i);
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regmap = syscon_node_to_regmap(np);
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if (IS_ERR(regmap))
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return;
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at91sam9g45_pmc = pmc_data_allocate(PMC_MAIN + 1,
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nck(at91sam9g45_systemck),
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nck(at91sam9g45_periphck), 0);
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if (!at91sam9g45_pmc)
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return;
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bypass = of_property_read_bool(np, "atmel,osc-bypass");
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hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
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bypass);
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if (IS_ERR(hw))
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goto err_free;
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hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc");
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if (IS_ERR(hw))
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goto err_free;
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at91sam9g45_pmc->chws[PMC_MAIN] = hw;
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hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
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&at91rm9200_pll_layout, &plla_characteristics);
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if (IS_ERR(hw))
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goto err_free;
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hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
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if (IS_ERR(hw))
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goto err_free;
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hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
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if (IS_ERR(hw))
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goto err_free;
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at91sam9g45_pmc->chws[PMC_UTMI] = hw;
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parent_names[0] = slck_name;
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parent_names[1] = "mainck";
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parent_names[2] = "plladivck";
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parent_names[3] = "utmick";
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hw = at91_clk_register_master(regmap, "masterck", 4, parent_names,
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&at91rm9200_master_layout,
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&mck_characteristics);
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if (IS_ERR(hw))
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goto err_free;
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at91sam9g45_pmc->chws[PMC_MCK] = hw;
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parent_names[0] = "plladivck";
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parent_names[1] = "utmick";
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hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
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if (IS_ERR(hw))
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goto err_free;
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parent_names[0] = slck_name;
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parent_names[1] = "mainck";
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parent_names[2] = "plladivck";
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parent_names[3] = "utmick";
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parent_names[4] = "masterck";
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for (i = 0; i < 2; i++) {
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char name[6];
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snprintf(name, sizeof(name), "prog%d", i);
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hw = at91_clk_register_programmable(regmap, name,
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parent_names, 5, i,
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&at91sam9g45_programmable_layout);
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if (IS_ERR(hw))
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goto err_free;
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}
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for (i = 0; i < ARRAY_SIZE(at91sam9g45_systemck); i++) {
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hw = at91_clk_register_system(regmap, at91sam9g45_systemck[i].n,
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at91sam9g45_systemck[i].p,
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at91sam9g45_systemck[i].id);
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if (IS_ERR(hw))
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goto err_free;
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at91sam9g45_pmc->shws[at91sam9g45_systemck[i].id] = hw;
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}
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for (i = 0; i < ARRAY_SIZE(at91sam9g45_periphck); i++) {
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hw = at91_clk_register_peripheral(regmap,
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at91sam9g45_periphck[i].n,
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"masterck",
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at91sam9g45_periphck[i].id);
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if (IS_ERR(hw))
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goto err_free;
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at91sam9g45_pmc->phws[at91sam9g45_periphck[i].id] = hw;
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}
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of_clk_add_hw_provider(np, of_clk_hw_pmc_get, at91sam9g45_pmc);
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return;
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err_free:
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pmc_data_free(at91sam9g45_pmc);
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}
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/*
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* The TCB is used as the clocksource so its clock is needed early. This means
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* this can't be a platform driver.
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*/
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CLK_OF_DECLARE_DRIVER(at91sam9g45_pmc, "atmel,at91sam9g45-pmc",
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at91sam9g45_pmc_setup);
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