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[ARM] 3894/1: pxa27x: Update DCSR_EORINTR bit definition in DCSR

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This patch updates a bit definition name to align with the PXA27x
spec.EORINTR(End-Of-Receive Intr) bit in DCSR register (DMA Channel
Control/Status Register)

Signed-off-by: Stanley Cai <stanley.w.cai@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
stanley cai 2006-10-16 15:13:43 +01:00 committed by Russell King
parent d94cffe3d3
commit 127e477e0c
1 changed files with 1 additions and 1 deletions
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2
include/asm-arm/arch-pxa/pxa-regs.h
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@ -99,7 +99,7 @@
#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */
#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */
#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */
#define DCSR_ENRINTR (1 << 9) /* The end of Receive */
#define DCSR_EORINTR (1 << 9) /* The end of Receive */
#endif
#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */
#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */