forked from Minki/linux
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue
Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates 2015-10-16 This series contains updates to e1000, e1000e, igb, igbvf, ixgbe, ixgbevf, i40e, i40evf and fm10k. Alex Duyck fixes the polling routine for i40e/i40evf were the NAPI budget for receive cleanup was being rounded up to 1 but the netpoll call was expecting no Rx to be processed as the budget passed was 0. Also cleaned up IN_NETPOLL flag that was not adding any value due to the receive cleanup was handled in NAPI. Added support for netpoll for i40evf as well. Jesse updates all of our drivers to use napi_complete_done() instead of napi_complete(), which allows us to use /sys/class/net/ethX/gro_flush_timeout. Added ethtool support to control and report the new Interrupt Limit register, since the XL710 hardware has a different interrupt moderation design that can support a limit of total interrupts per second per vector. Shannon cleans up startup log entries to cut down the number by putting a couple behind debug flags and combining others into single line. Added support to enable/disable printing VEB statistics via ethtool. Jingjing fixes a compile issue by adding const to functions that return strings that are not going to be modified. Greg Rose cleans up defines that were not used and were causing customer confusion. Greg Bowers adds support for setting a new bit in the Set Local LLDP MIB admin queue command Type field. Mitch fixes an issue where vlan_features field was set to the same value as netdev features field, but before the features were actually being set up, leaving the vlan_features empty. Resolve the issue by setting up the netdev features first, then mask out the VLAN feature bits when assigning vlan_features. Fixed VF init timing, where in some instances the VFs would fail to initialize the first time you loaded the driver. To correct this, increased the delay time for the init task and wait longer before giving up. v2: fix missing space in function header comment in patch 3, based on feedback from Sergei Shtylyov. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
125ecf4b59
@ -3820,7 +3820,7 @@ static int e1000_clean(struct napi_struct *napi, int budget)
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if (work_done < budget) {
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if (work_done < budget) {
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if (likely(adapter->itr_setting & 3))
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if (likely(adapter->itr_setting & 3))
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e1000_set_itr(adapter);
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e1000_set_itr(adapter);
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napi_complete(napi);
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napi_complete_done(napi, work_done);
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if (!test_bit(__E1000_DOWN, &adapter->flags))
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if (!test_bit(__E1000_DOWN, &adapter->flags))
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e1000_irq_enable(adapter);
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e1000_irq_enable(adapter);
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}
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}
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@ -2693,7 +2693,7 @@ static int e1000e_poll(struct napi_struct *napi, int weight)
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if (work_done < weight) {
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if (work_done < weight) {
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if (adapter->itr_setting & 3)
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if (adapter->itr_setting & 3)
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e1000_set_itr(adapter);
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e1000_set_itr(adapter);
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napi_complete(napi);
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napi_complete_done(napi, work_done);
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if (!test_bit(__E1000_DOWN, &adapter->state)) {
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if (!test_bit(__E1000_DOWN, &adapter->state)) {
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if (adapter->msix_entries)
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if (adapter->msix_entries)
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ew32(IMS, adapter->rx_ring->ims_val);
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ew32(IMS, adapter->rx_ring->ims_val);
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@ -593,7 +593,7 @@ static void fm10k_receive_skb(struct fm10k_q_vector *q_vector,
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napi_gro_receive(&q_vector->napi, skb);
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napi_gro_receive(&q_vector->napi, skb);
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}
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}
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static bool fm10k_clean_rx_irq(struct fm10k_q_vector *q_vector,
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static int fm10k_clean_rx_irq(struct fm10k_q_vector *q_vector,
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struct fm10k_ring *rx_ring,
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struct fm10k_ring *rx_ring,
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int budget)
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int budget)
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{
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{
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@ -662,7 +662,7 @@ static bool fm10k_clean_rx_irq(struct fm10k_q_vector *q_vector,
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q_vector->rx.total_packets += total_packets;
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q_vector->rx.total_packets += total_packets;
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q_vector->rx.total_bytes += total_bytes;
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q_vector->rx.total_bytes += total_bytes;
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return total_packets < budget;
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return total_packets;
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}
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}
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#define VXLAN_HLEN (sizeof(struct udphdr) + 8)
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#define VXLAN_HLEN (sizeof(struct udphdr) + 8)
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@ -1422,7 +1422,7 @@ static int fm10k_poll(struct napi_struct *napi, int budget)
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struct fm10k_q_vector *q_vector =
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struct fm10k_q_vector *q_vector =
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container_of(napi, struct fm10k_q_vector, napi);
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container_of(napi, struct fm10k_q_vector, napi);
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struct fm10k_ring *ring;
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struct fm10k_ring *ring;
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int per_ring_budget;
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int per_ring_budget, work_done = 0;
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bool clean_complete = true;
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bool clean_complete = true;
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fm10k_for_each_ring(ring, q_vector->tx)
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fm10k_for_each_ring(ring, q_vector->tx)
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@ -1436,16 +1436,19 @@ static int fm10k_poll(struct napi_struct *napi, int budget)
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else
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else
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per_ring_budget = budget;
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per_ring_budget = budget;
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fm10k_for_each_ring(ring, q_vector->rx)
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fm10k_for_each_ring(ring, q_vector->rx) {
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clean_complete &= fm10k_clean_rx_irq(q_vector, ring,
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int work = fm10k_clean_rx_irq(q_vector, ring, per_ring_budget);
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per_ring_budget);
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work_done += work;
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clean_complete &= !!(work < per_ring_budget);
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}
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/* If all work not completed, return budget and keep polling */
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/* If all work not completed, return budget and keep polling */
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if (!clean_complete)
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if (!clean_complete)
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return budget;
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return budget;
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/* all work done, exit the polling mode */
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/* all work done, exit the polling mode */
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napi_complete(napi);
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napi_complete_done(napi, work_done);
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/* re-enable the q_vector */
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/* re-enable the q_vector */
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fm10k_qv_enable(q_vector);
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fm10k_qv_enable(q_vector);
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@ -93,7 +93,7 @@
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#endif /* I40E_FCOE */
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#endif /* I40E_FCOE */
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#define I40E_MAX_AQ_BUF_SIZE 4096
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#define I40E_MAX_AQ_BUF_SIZE 4096
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#define I40E_AQ_LEN 256
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#define I40E_AQ_LEN 256
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#define I40E_AQ_WORK_LIMIT 32
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#define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */
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#define I40E_MAX_USER_PRIORITY 8
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#define I40E_MAX_USER_PRIORITY 8
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#define I40E_DEFAULT_MSG_ENABLE 4
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#define I40E_DEFAULT_MSG_ENABLE 4
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#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
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#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
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@ -103,6 +103,7 @@
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#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
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#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
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#define I40E_PRIV_FLAGS_LINKPOLL_FLAG BIT(1)
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#define I40E_PRIV_FLAGS_LINKPOLL_FLAG BIT(1)
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#define I40E_PRIV_FLAGS_FD_ATR BIT(2)
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#define I40E_PRIV_FLAGS_FD_ATR BIT(2)
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#define I40E_PRIV_FLAGS_VEB_STATS BIT(3)
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#define I40E_NVM_VERSION_LO_SHIFT 0
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#define I40E_NVM_VERSION_LO_SHIFT 0
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#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
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#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
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@ -307,7 +308,6 @@ struct i40e_pf {
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#ifdef I40E_FCOE
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#ifdef I40E_FCOE
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#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
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#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
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#endif /* I40E_FCOE */
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#endif /* I40E_FCOE */
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#define I40E_FLAG_IN_NETPOLL BIT_ULL(12)
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#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
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#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
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#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
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#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
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#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
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#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
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@ -498,6 +498,7 @@ struct i40e_vsi {
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*/
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*/
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u16 rx_itr_setting;
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u16 rx_itr_setting;
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u16 tx_itr_setting;
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u16 tx_itr_setting;
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u16 int_rate_limit; /* value in usecs */
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u16 rss_table_size;
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u16 rss_table_size;
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u16 rss_size;
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u16 rss_size;
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@ -583,10 +584,10 @@ struct i40e_device {
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};
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};
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/**
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/**
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* i40e_fw_version_str - format the FW and NVM version strings
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* i40e_nvm_version_str - format the NVM version strings
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* @hw: ptr to the hardware info
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* @hw: ptr to the hardware info
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**/
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**/
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static inline char *i40e_fw_version_str(struct i40e_hw *hw)
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static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
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{
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{
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static char buf[32];
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static char buf[32];
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@ -2132,6 +2132,13 @@ I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_cee_dcb_cfg_resp);
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struct i40e_aqc_lldp_set_local_mib {
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struct i40e_aqc_lldp_set_local_mib {
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#define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0
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#define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0
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#define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT)
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#define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT)
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#define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << \
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SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT)
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#define SET_LOCAL_MIB_AC_TYPE_LOCAL_MIB 0x0
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#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT (1)
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#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_MASK (1 << \
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SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT)
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#define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS 0x1
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u8 type;
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u8 type;
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u8 reserved0;
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u8 reserved0;
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__le16 length;
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__le16 length;
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@ -87,7 +87,7 @@ static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
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* @hw: pointer to the HW structure
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* @hw: pointer to the HW structure
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* @aq_err: the AQ error code to convert
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* @aq_err: the AQ error code to convert
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**/
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**/
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char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
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const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
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{
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{
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switch (aq_err) {
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switch (aq_err) {
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case I40E_AQ_RC_OK:
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case I40E_AQ_RC_OK:
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@ -147,7 +147,7 @@ char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
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* @hw: pointer to the HW structure
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* @hw: pointer to the HW structure
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* @stat_err: the status error code to convert
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* @stat_err: the status error code to convert
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**/
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**/
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char *i40e_stat_str(struct i40e_hw *hw, i40e_status stat_err)
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const char *i40e_stat_str(struct i40e_hw *hw, i40e_status stat_err)
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{
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{
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switch (stat_err) {
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switch (stat_err) {
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case 0:
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case 0:
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@ -229,6 +229,7 @@ static const char i40e_priv_flags_strings[][ETH_GSTRING_LEN] = {
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"NPAR",
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"NPAR",
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"LinkPolling",
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"LinkPolling",
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"flow-director-atr",
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"flow-director-atr",
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"veb-stats",
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};
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};
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#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_priv_flags_strings)
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#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_priv_flags_strings)
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@ -306,6 +307,12 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,
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if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
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if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
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ecmd->advertising |= ADVERTISED_1000baseT_Full;
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ecmd->advertising |= ADVERTISED_1000baseT_Full;
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break;
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break;
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case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
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ecmd->supported = SUPPORTED_Autoneg |
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SUPPORTED_1000baseT_Full;
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ecmd->advertising = ADVERTISED_Autoneg |
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ADVERTISED_1000baseT_Full;
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break;
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case I40E_PHY_TYPE_100BASE_TX:
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case I40E_PHY_TYPE_100BASE_TX:
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ecmd->supported = SUPPORTED_Autoneg |
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ecmd->supported = SUPPORTED_Autoneg |
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SUPPORTED_100baseT_Full;
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SUPPORTED_100baseT_Full;
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@ -993,9 +1000,7 @@ static int i40e_get_eeprom(struct net_device *netdev,
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cmd = (struct i40e_nvm_access *)eeprom;
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cmd = (struct i40e_nvm_access *)eeprom;
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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if (ret_val &&
|
if (ret_val && (hw->debug_mask & I40E_DEBUG_NVM))
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((hw->aq.asq_last_status != I40E_AQ_RC_EACCES) ||
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(hw->debug_mask & I40E_DEBUG_NVM)))
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dev_info(&pf->pdev->dev,
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dev_info(&pf->pdev->dev,
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"NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
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"NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
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ret_val, hw->aq.asq_last_status, errno,
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ret_val, hw->aq.asq_last_status, errno,
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@ -1099,10 +1104,7 @@ static int i40e_set_eeprom(struct net_device *netdev,
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|
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cmd = (struct i40e_nvm_access *)eeprom;
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cmd = (struct i40e_nvm_access *)eeprom;
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
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if (ret_val &&
|
if (ret_val && (hw->debug_mask & I40E_DEBUG_NVM))
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((hw->aq.asq_last_status != I40E_AQ_RC_EPERM &&
|
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hw->aq.asq_last_status != I40E_AQ_RC_EBUSY) ||
|
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(hw->debug_mask & I40E_DEBUG_NVM)))
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dev_info(&pf->pdev->dev,
|
dev_info(&pf->pdev->dev,
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"NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
|
"NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
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ret_val, hw->aq.asq_last_status, errno,
|
ret_val, hw->aq.asq_last_status, errno,
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@ -1122,7 +1124,7 @@ static void i40e_get_drvinfo(struct net_device *netdev,
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strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
|
strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
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strlcpy(drvinfo->version, i40e_driver_version_str,
|
strlcpy(drvinfo->version, i40e_driver_version_str,
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sizeof(drvinfo->version));
|
sizeof(drvinfo->version));
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strlcpy(drvinfo->fw_version, i40e_fw_version_str(&pf->hw),
|
strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
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sizeof(drvinfo->fw_version));
|
sizeof(drvinfo->fw_version));
|
||||||
strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
|
strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
|
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sizeof(drvinfo->bus_info));
|
sizeof(drvinfo->bus_info));
|
||||||
@ -1849,6 +1851,14 @@ static int i40e_get_coalesce(struct net_device *netdev,
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|||||||
|
|
||||||
ec->rx_coalesce_usecs = vsi->rx_itr_setting & ~I40E_ITR_DYNAMIC;
|
ec->rx_coalesce_usecs = vsi->rx_itr_setting & ~I40E_ITR_DYNAMIC;
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||||||
ec->tx_coalesce_usecs = vsi->tx_itr_setting & ~I40E_ITR_DYNAMIC;
|
ec->tx_coalesce_usecs = vsi->tx_itr_setting & ~I40E_ITR_DYNAMIC;
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||||||
|
/* we use the _usecs_high to store/set the interrupt rate limit
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||||||
|
* that the hardware supports, that almost but not quite
|
||||||
|
* fits the original intent of the ethtool variable,
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||||||
|
* the rx_coalesce_usecs_high limits total interrupts
|
||||||
|
* per second from both tx/rx sources.
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||||||
|
*/
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||||||
|
ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
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||||||
|
ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
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||||||
@ -1867,6 +1877,17 @@ static int i40e_set_coalesce(struct net_device *netdev,
|
|||||||
if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
|
if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
|
||||||
vsi->work_limit = ec->tx_max_coalesced_frames_irq;
|
vsi->work_limit = ec->tx_max_coalesced_frames_irq;
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||||||
|
|
||||||
|
/* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
|
||||||
|
if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
|
||||||
|
netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (ec->rx_coalesce_usecs_high >= INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
|
||||||
|
netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-235\n");
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
vector = vsi->base_vector;
|
vector = vsi->base_vector;
|
||||||
if ((ec->rx_coalesce_usecs >= (I40E_MIN_ITR << 1)) &&
|
if ((ec->rx_coalesce_usecs >= (I40E_MIN_ITR << 1)) &&
|
||||||
(ec->rx_coalesce_usecs <= (I40E_MAX_ITR << 1))) {
|
(ec->rx_coalesce_usecs <= (I40E_MAX_ITR << 1))) {
|
||||||
@ -1880,6 +1901,8 @@ static int i40e_set_coalesce(struct net_device *netdev,
|
|||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
vsi->int_rate_limit = ec->rx_coalesce_usecs_high;
|
||||||
|
|
||||||
if ((ec->tx_coalesce_usecs >= (I40E_MIN_ITR << 1)) &&
|
if ((ec->tx_coalesce_usecs >= (I40E_MIN_ITR << 1)) &&
|
||||||
(ec->tx_coalesce_usecs <= (I40E_MAX_ITR << 1))) {
|
(ec->tx_coalesce_usecs <= (I40E_MAX_ITR << 1))) {
|
||||||
vsi->tx_itr_setting = ec->tx_coalesce_usecs;
|
vsi->tx_itr_setting = ec->tx_coalesce_usecs;
|
||||||
@ -1904,11 +1927,14 @@ static int i40e_set_coalesce(struct net_device *netdev,
|
|||||||
vsi->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
|
vsi->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
|
||||||
|
|
||||||
for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
|
for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
|
||||||
|
u16 intrl = INTRL_USEC_TO_REG(vsi->int_rate_limit);
|
||||||
|
|
||||||
q_vector = vsi->q_vectors[i];
|
q_vector = vsi->q_vectors[i];
|
||||||
q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
|
q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
|
||||||
wr32(hw, I40E_PFINT_ITRN(0, vector - 1), q_vector->rx.itr);
|
wr32(hw, I40E_PFINT_ITRN(0, vector - 1), q_vector->rx.itr);
|
||||||
q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
|
q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
|
||||||
wr32(hw, I40E_PFINT_ITRN(1, vector - 1), q_vector->tx.itr);
|
wr32(hw, I40E_PFINT_ITRN(1, vector - 1), q_vector->tx.itr);
|
||||||
|
wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl);
|
||||||
i40e_flush(hw);
|
i40e_flush(hw);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2675,6 +2701,8 @@ static u32 i40e_get_priv_flags(struct net_device *dev)
|
|||||||
I40E_PRIV_FLAGS_LINKPOLL_FLAG : 0;
|
I40E_PRIV_FLAGS_LINKPOLL_FLAG : 0;
|
||||||
ret_flags |= pf->flags & I40E_FLAG_FD_ATR_ENABLED ?
|
ret_flags |= pf->flags & I40E_FLAG_FD_ATR_ENABLED ?
|
||||||
I40E_PRIV_FLAGS_FD_ATR : 0;
|
I40E_PRIV_FLAGS_FD_ATR : 0;
|
||||||
|
ret_flags |= pf->flags & I40E_FLAG_VEB_STATS_ENABLED ?
|
||||||
|
I40E_PRIV_FLAGS_VEB_STATS : 0;
|
||||||
|
|
||||||
return ret_flags;
|
return ret_flags;
|
||||||
}
|
}
|
||||||
@ -2706,6 +2734,11 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
|
|||||||
pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
|
pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (flags & I40E_PRIV_FLAGS_VEB_STATS)
|
||||||
|
pf->flags |= I40E_FLAG_VEB_STATS_ENABLED;
|
||||||
|
else
|
||||||
|
pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -39,7 +39,7 @@ static const char i40e_driver_string[] =
|
|||||||
|
|
||||||
#define DRV_VERSION_MAJOR 1
|
#define DRV_VERSION_MAJOR 1
|
||||||
#define DRV_VERSION_MINOR 3
|
#define DRV_VERSION_MINOR 3
|
||||||
#define DRV_VERSION_BUILD 28
|
#define DRV_VERSION_BUILD 34
|
||||||
#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
|
#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
|
||||||
__stringify(DRV_VERSION_MINOR) "." \
|
__stringify(DRV_VERSION_MINOR) "." \
|
||||||
__stringify(DRV_VERSION_BUILD) DRV_KERN
|
__stringify(DRV_VERSION_BUILD) DRV_KERN
|
||||||
@ -2901,11 +2901,9 @@ static int i40e_vsi_configure(struct i40e_vsi *vsi)
|
|||||||
static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
|
static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
|
||||||
{
|
{
|
||||||
struct i40e_pf *pf = vsi->back;
|
struct i40e_pf *pf = vsi->back;
|
||||||
struct i40e_q_vector *q_vector;
|
|
||||||
struct i40e_hw *hw = &pf->hw;
|
struct i40e_hw *hw = &pf->hw;
|
||||||
u16 vector;
|
u16 vector;
|
||||||
int i, q;
|
int i, q;
|
||||||
u32 val;
|
|
||||||
u32 qp;
|
u32 qp;
|
||||||
|
|
||||||
/* The interrupt indexing is offset by 1 in the PFINT_ITRn
|
/* The interrupt indexing is offset by 1 in the PFINT_ITRn
|
||||||
@ -2915,7 +2913,8 @@ static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
|
|||||||
qp = vsi->base_queue;
|
qp = vsi->base_queue;
|
||||||
vector = vsi->base_vector;
|
vector = vsi->base_vector;
|
||||||
for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
|
for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
|
||||||
q_vector = vsi->q_vectors[i];
|
struct i40e_q_vector *q_vector = vsi->q_vectors[i];
|
||||||
|
|
||||||
q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
|
q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
|
||||||
q_vector->rx.latency_range = I40E_LOW_LATENCY;
|
q_vector->rx.latency_range = I40E_LOW_LATENCY;
|
||||||
wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
|
wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
|
||||||
@ -2924,10 +2923,14 @@ static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
|
|||||||
q_vector->tx.latency_range = I40E_LOW_LATENCY;
|
q_vector->tx.latency_range = I40E_LOW_LATENCY;
|
||||||
wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
|
wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
|
||||||
q_vector->tx.itr);
|
q_vector->tx.itr);
|
||||||
|
wr32(hw, I40E_PFINT_RATEN(vector - 1),
|
||||||
|
INTRL_USEC_TO_REG(vsi->int_rate_limit));
|
||||||
|
|
||||||
/* Linked list for the queuepairs assigned to this vector */
|
/* Linked list for the queuepairs assigned to this vector */
|
||||||
wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
|
wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
|
||||||
for (q = 0; q < q_vector->num_ringpairs; q++) {
|
for (q = 0; q < q_vector->num_ringpairs; q++) {
|
||||||
|
u32 val;
|
||||||
|
|
||||||
val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
|
val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
|
||||||
(I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
|
(I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
|
||||||
(vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
|
(vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
|
||||||
@ -3574,14 +3577,12 @@ static void i40e_netpoll(struct net_device *netdev)
|
|||||||
if (test_bit(__I40E_DOWN, &vsi->state))
|
if (test_bit(__I40E_DOWN, &vsi->state))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
pf->flags |= I40E_FLAG_IN_NETPOLL;
|
|
||||||
if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
|
if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
|
||||||
for (i = 0; i < vsi->num_q_vectors; i++)
|
for (i = 0; i < vsi->num_q_vectors; i++)
|
||||||
i40e_msix_clean_rings(0, vsi->q_vectors[i]);
|
i40e_msix_clean_rings(0, vsi->q_vectors[i]);
|
||||||
} else {
|
} else {
|
||||||
i40e_intr(pf->pdev->irq, netdev);
|
i40e_intr(pf->pdev->irq, netdev);
|
||||||
}
|
}
|
||||||
pf->flags &= ~I40E_FLAG_IN_NETPOLL;
|
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -6220,6 +6221,7 @@ static void i40e_config_bridge_mode(struct i40e_veb *veb)
|
|||||||
{
|
{
|
||||||
struct i40e_pf *pf = veb->pf;
|
struct i40e_pf *pf = veb->pf;
|
||||||
|
|
||||||
|
if (pf->hw.debug_mask & I40E_DEBUG_LAN)
|
||||||
dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
|
dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
|
||||||
veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
|
veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
|
||||||
if (veb->bridge_mode & BRIDGE_MODE_VEPA)
|
if (veb->bridge_mode & BRIDGE_MODE_VEPA)
|
||||||
@ -7041,6 +7043,7 @@ static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
|
|||||||
vsi->idx = vsi_idx;
|
vsi->idx = vsi_idx;
|
||||||
vsi->rx_itr_setting = pf->rx_itr_default;
|
vsi->rx_itr_setting = pf->rx_itr_default;
|
||||||
vsi->tx_itr_setting = pf->tx_itr_default;
|
vsi->tx_itr_setting = pf->tx_itr_default;
|
||||||
|
vsi->int_rate_limit = 0;
|
||||||
vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
|
vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
|
||||||
pf->rss_table_size : 64;
|
pf->rss_table_size : 64;
|
||||||
vsi->netdev_registered = false;
|
vsi->netdev_registered = false;
|
||||||
@ -9925,6 +9928,10 @@ static void i40e_print_features(struct i40e_pf *pf)
|
|||||||
if (pf->flags & I40E_FLAG_FCOE_ENABLED)
|
if (pf->flags & I40E_FLAG_FCOE_ENABLED)
|
||||||
buf += sprintf(buf, "FCOE ");
|
buf += sprintf(buf, "FCOE ");
|
||||||
#endif
|
#endif
|
||||||
|
if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
|
||||||
|
buf += sprintf(buf, "VEB ");
|
||||||
|
else
|
||||||
|
buf += sprintf(buf, "VEPA ");
|
||||||
|
|
||||||
BUG_ON(buf > (string + INFO_STRING_LEN));
|
BUG_ON(buf > (string + INFO_STRING_LEN));
|
||||||
dev_info(&pf->pdev->dev, "%s\n", string);
|
dev_info(&pf->pdev->dev, "%s\n", string);
|
||||||
@ -10064,13 +10071,12 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|||||||
pf->hw.fc.requested_mode = I40E_FC_NONE;
|
pf->hw.fc.requested_mode = I40E_FC_NONE;
|
||||||
|
|
||||||
err = i40e_init_adminq(hw);
|
err = i40e_init_adminq(hw);
|
||||||
dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
|
|
||||||
|
|
||||||
/* provide additional fw info, like api and ver */
|
/* provide nvm, fw, api versions */
|
||||||
dev_info(&pdev->dev, "fw_version:%d.%d.%05d\n",
|
dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
|
||||||
hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build);
|
hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
|
||||||
dev_info(&pdev->dev, "fw api version:%d.%d\n",
|
hw->aq.api_maj_ver, hw->aq.api_min_ver,
|
||||||
hw->aq.api_maj_ver, hw->aq.api_min_ver);
|
i40e_nvm_version_str(hw));
|
||||||
|
|
||||||
if (err) {
|
if (err) {
|
||||||
dev_info(&pdev->dev,
|
dev_info(&pdev->dev,
|
||||||
|
@ -632,7 +632,7 @@ static inline u8 i40e_nvmupd_get_transaction(u32 val)
|
|||||||
return (u8)((val & I40E_NVM_TRANS_MASK) >> I40E_NVM_TRANS_SHIFT);
|
return (u8)((val & I40E_NVM_TRANS_MASK) >> I40E_NVM_TRANS_SHIFT);
|
||||||
}
|
}
|
||||||
|
|
||||||
static char *i40e_nvm_update_state_str[] = {
|
static const char * const i40e_nvm_update_state_str[] = {
|
||||||
"I40E_NVMUPD_INVALID",
|
"I40E_NVMUPD_INVALID",
|
||||||
"I40E_NVMUPD_READ_CON",
|
"I40E_NVMUPD_READ_CON",
|
||||||
"I40E_NVMUPD_READ_SNT",
|
"I40E_NVMUPD_READ_SNT",
|
||||||
|
@ -58,8 +58,8 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask,
|
|||||||
void i40e_idle_aq(struct i40e_hw *hw);
|
void i40e_idle_aq(struct i40e_hw *hw);
|
||||||
bool i40e_check_asq_alive(struct i40e_hw *hw);
|
bool i40e_check_asq_alive(struct i40e_hw *hw);
|
||||||
i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
|
i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
|
||||||
char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
|
const char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
|
||||||
char *i40e_stat_str(struct i40e_hw *hw, i40e_status stat_err);
|
const char *i40e_stat_str(struct i40e_hw *hw, i40e_status stat_err);
|
||||||
|
|
||||||
i40e_status i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
|
i40e_status i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
|
||||||
bool pf_lut, u8 *lut, u16 lut_size);
|
bool pf_lut, u8 *lut, u16 lut_size);
|
||||||
|
@ -674,8 +674,8 @@ void i40e_ptp_init(struct i40e_pf *pf)
|
|||||||
struct timespec64 ts;
|
struct timespec64 ts;
|
||||||
u32 regval;
|
u32 regval;
|
||||||
|
|
||||||
dev_info(&pf->pdev->dev, "%s: added PHC on %s\n", __func__,
|
if (pf->hw.debug_mask & I40E_DEBUG_LAN)
|
||||||
netdev->name);
|
dev_info(&pf->pdev->dev, "PHC enabled\n");
|
||||||
pf->flags |= I40E_FLAG_PTP;
|
pf->flags |= I40E_FLAG_PTP;
|
||||||
|
|
||||||
/* Ensure the clocks are running. */
|
/* Ensure the clocks are running. */
|
||||||
|
@ -1268,15 +1268,10 @@ static void i40e_receive_skb(struct i40e_ring *rx_ring,
|
|||||||
struct sk_buff *skb, u16 vlan_tag)
|
struct sk_buff *skb, u16 vlan_tag)
|
||||||
{
|
{
|
||||||
struct i40e_q_vector *q_vector = rx_ring->q_vector;
|
struct i40e_q_vector *q_vector = rx_ring->q_vector;
|
||||||
struct i40e_vsi *vsi = rx_ring->vsi;
|
|
||||||
u64 flags = vsi->back->flags;
|
|
||||||
|
|
||||||
if (vlan_tag & VLAN_VID_MASK)
|
if (vlan_tag & VLAN_VID_MASK)
|
||||||
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
|
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
|
||||||
|
|
||||||
if (flags & I40E_FLAG_IN_NETPOLL)
|
|
||||||
netif_rx(skb);
|
|
||||||
else
|
|
||||||
napi_gro_receive(&q_vector->napi, skb);
|
napi_gro_receive(&q_vector->napi, skb);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1830,7 +1825,7 @@ int i40e_napi_poll(struct napi_struct *napi, int budget)
|
|||||||
bool clean_complete = true;
|
bool clean_complete = true;
|
||||||
bool arm_wb = false;
|
bool arm_wb = false;
|
||||||
int budget_per_ring;
|
int budget_per_ring;
|
||||||
int cleaned;
|
int work_done = 0;
|
||||||
|
|
||||||
if (test_bit(__I40E_DOWN, &vsi->state)) {
|
if (test_bit(__I40E_DOWN, &vsi->state)) {
|
||||||
napi_complete(napi);
|
napi_complete(napi);
|
||||||
@ -1846,22 +1841,31 @@ int i40e_napi_poll(struct napi_struct *napi, int budget)
|
|||||||
ring->arm_wb = false;
|
ring->arm_wb = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Handle case where we are called by netpoll with a budget of 0 */
|
||||||
|
if (budget <= 0)
|
||||||
|
goto tx_only;
|
||||||
|
|
||||||
/* We attempt to distribute budget to each Rx queue fairly, but don't
|
/* We attempt to distribute budget to each Rx queue fairly, but don't
|
||||||
* allow the budget to go below 1 because that would exit polling early.
|
* allow the budget to go below 1 because that would exit polling early.
|
||||||
*/
|
*/
|
||||||
budget_per_ring = max(budget/q_vector->num_ringpairs, 1);
|
budget_per_ring = max(budget/q_vector->num_ringpairs, 1);
|
||||||
|
|
||||||
i40e_for_each_ring(ring, q_vector->rx) {
|
i40e_for_each_ring(ring, q_vector->rx) {
|
||||||
|
int cleaned;
|
||||||
|
|
||||||
if (ring_is_ps_enabled(ring))
|
if (ring_is_ps_enabled(ring))
|
||||||
cleaned = i40e_clean_rx_irq_ps(ring, budget_per_ring);
|
cleaned = i40e_clean_rx_irq_ps(ring, budget_per_ring);
|
||||||
else
|
else
|
||||||
cleaned = i40e_clean_rx_irq_1buf(ring, budget_per_ring);
|
cleaned = i40e_clean_rx_irq_1buf(ring, budget_per_ring);
|
||||||
|
|
||||||
|
work_done += cleaned;
|
||||||
/* if we didn't clean as many as budgeted, we must be done */
|
/* if we didn't clean as many as budgeted, we must be done */
|
||||||
clean_complete &= (budget_per_ring != cleaned);
|
clean_complete &= (budget_per_ring != cleaned);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If work not completed, return budget and polling will return */
|
/* If work not completed, return budget and polling will return */
|
||||||
if (!clean_complete) {
|
if (!clean_complete) {
|
||||||
|
tx_only:
|
||||||
if (arm_wb)
|
if (arm_wb)
|
||||||
i40e_force_wb(vsi, q_vector);
|
i40e_force_wb(vsi, q_vector);
|
||||||
return budget;
|
return budget;
|
||||||
@ -1871,7 +1875,7 @@ int i40e_napi_poll(struct napi_struct *napi, int budget)
|
|||||||
q_vector->arm_wb_state = false;
|
q_vector->arm_wb_state = false;
|
||||||
|
|
||||||
/* Work is done so exit the polling mode and re-enable the interrupt */
|
/* Work is done so exit the polling mode and re-enable the interrupt */
|
||||||
napi_complete(napi);
|
napi_complete_done(napi, work_done);
|
||||||
if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
|
if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
|
||||||
i40e_update_enable_itr(vsi, q_vector);
|
i40e_update_enable_itr(vsi, q_vector);
|
||||||
} else { /* Legacy mode */
|
} else { /* Legacy mode */
|
||||||
|
@ -35,6 +35,7 @@
|
|||||||
#define I40E_ITR_20K 0x0019
|
#define I40E_ITR_20K 0x0019
|
||||||
#define I40E_ITR_8K 0x003E
|
#define I40E_ITR_8K 0x003E
|
||||||
#define I40E_ITR_4K 0x007A
|
#define I40E_ITR_4K 0x007A
|
||||||
|
#define I40E_MAX_INTRL 0x3B /* reg uses 4 usec resolution */
|
||||||
#define I40E_ITR_RX_DEF I40E_ITR_8K
|
#define I40E_ITR_RX_DEF I40E_ITR_8K
|
||||||
#define I40E_ITR_TX_DEF I40E_ITR_4K
|
#define I40E_ITR_TX_DEF I40E_ITR_4K
|
||||||
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
|
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
|
||||||
@ -44,6 +45,15 @@
|
|||||||
#define ITR_TO_REG(setting) ((setting & ~I40E_ITR_DYNAMIC) >> 1)
|
#define ITR_TO_REG(setting) ((setting & ~I40E_ITR_DYNAMIC) >> 1)
|
||||||
#define ITR_IS_DYNAMIC(setting) (!!(setting & I40E_ITR_DYNAMIC))
|
#define ITR_IS_DYNAMIC(setting) (!!(setting & I40E_ITR_DYNAMIC))
|
||||||
#define ITR_REG_TO_USEC(itr_reg) (itr_reg << 1)
|
#define ITR_REG_TO_USEC(itr_reg) (itr_reg << 1)
|
||||||
|
/* 0x40 is the enable bit for interrupt rate limiting, and must be set if
|
||||||
|
* the value of the rate limit is non-zero
|
||||||
|
*/
|
||||||
|
#define INTRL_ENA BIT(6)
|
||||||
|
#define INTRL_REG_TO_USEC(intrl) ((intrl & ~INTRL_ENA) << 2)
|
||||||
|
#define INTRL_USEC_TO_REG(set) ((set) ? ((set) >> 2) | INTRL_ENA : 0)
|
||||||
|
#define I40E_INTRL_8K 125 /* 8000 ints/sec */
|
||||||
|
#define I40E_INTRL_62K 16 /* 62500 ints/sec */
|
||||||
|
#define I40E_INTRL_83K 12 /* 83333 ints/sec */
|
||||||
|
|
||||||
#define I40E_QUEUE_END_OF_LIST 0x7FF
|
#define I40E_QUEUE_END_OF_LIST 0x7FF
|
||||||
|
|
||||||
|
@ -475,6 +475,8 @@ struct i40e_dcbx_config {
|
|||||||
u8 dcbx_mode;
|
u8 dcbx_mode;
|
||||||
#define I40E_DCBX_MODE_CEE 0x1
|
#define I40E_DCBX_MODE_CEE 0x1
|
||||||
#define I40E_DCBX_MODE_IEEE 0x2
|
#define I40E_DCBX_MODE_IEEE 0x2
|
||||||
|
u8 app_mode;
|
||||||
|
#define I40E_DCBX_APPS_NON_WILLING 0x1
|
||||||
u32 numapps;
|
u32 numapps;
|
||||||
u32 tlv_status; /* CEE mode TLV status */
|
u32 tlv_status; /* CEE mode TLV status */
|
||||||
struct i40e_dcb_ets_config etscfg;
|
struct i40e_dcb_ets_config etscfg;
|
||||||
|
@ -1102,6 +1102,8 @@ static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
|
|||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
vf->num_valid_msgs++;
|
vf->num_valid_msgs++;
|
||||||
|
/* reset the invalid counter, if a valid message is received. */
|
||||||
|
vf->num_invalid_msgs = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
|
aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
|
||||||
|
@ -29,8 +29,6 @@
|
|||||||
|
|
||||||
#include "i40e.h"
|
#include "i40e.h"
|
||||||
|
|
||||||
#define I40E_MAX_MACVLAN_FILTERS 256
|
|
||||||
#define I40E_MAX_VLAN_FILTERS 256
|
|
||||||
#define I40E_MAX_VLANID 4095
|
#define I40E_MAX_VLANID 4095
|
||||||
|
|
||||||
#define I40E_VIRTCHNL_SUPPORTED_QTYPES 2
|
#define I40E_VIRTCHNL_SUPPORTED_QTYPES 2
|
||||||
@ -98,7 +96,8 @@ struct i40e_vf {
|
|||||||
|
|
||||||
u8 num_queue_pairs; /* num of qps assigned to VF vsis */
|
u8 num_queue_pairs; /* num of qps assigned to VF vsis */
|
||||||
u64 num_mdd_events; /* num of mdd events detected */
|
u64 num_mdd_events; /* num of mdd events detected */
|
||||||
u64 num_invalid_msgs; /* num of malformed or invalid msgs detected */
|
/* num of continuous malformed or invalid msgs detected */
|
||||||
|
u64 num_invalid_msgs;
|
||||||
u64 num_valid_msgs; /* num of valid msgs detected */
|
u64 num_valid_msgs; /* num of valid msgs detected */
|
||||||
|
|
||||||
unsigned long vf_caps; /* vf's adv. capabilities */
|
unsigned long vf_caps; /* vf's adv. capabilities */
|
||||||
|
@ -87,7 +87,7 @@ i40e_status i40e_set_mac_type(struct i40e_hw *hw)
|
|||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @aq_err: the AQ error code to convert
|
* @aq_err: the AQ error code to convert
|
||||||
**/
|
**/
|
||||||
char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
|
const char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
|
||||||
{
|
{
|
||||||
switch (aq_err) {
|
switch (aq_err) {
|
||||||
case I40E_AQ_RC_OK:
|
case I40E_AQ_RC_OK:
|
||||||
@ -147,7 +147,7 @@ char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err)
|
|||||||
* @hw: pointer to the HW structure
|
* @hw: pointer to the HW structure
|
||||||
* @stat_err: the status error code to convert
|
* @stat_err: the status error code to convert
|
||||||
**/
|
**/
|
||||||
char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err)
|
const char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err)
|
||||||
{
|
{
|
||||||
switch (stat_err) {
|
switch (stat_err) {
|
||||||
case 0:
|
case 0:
|
||||||
|
@ -60,8 +60,8 @@ void i40e_idle_aq(struct i40e_hw *hw);
|
|||||||
void i40evf_resume_aq(struct i40e_hw *hw);
|
void i40evf_resume_aq(struct i40e_hw *hw);
|
||||||
bool i40evf_check_asq_alive(struct i40e_hw *hw);
|
bool i40evf_check_asq_alive(struct i40e_hw *hw);
|
||||||
i40e_status i40evf_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
|
i40e_status i40evf_aq_queue_shutdown(struct i40e_hw *hw, bool unloading);
|
||||||
char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
|
const char *i40evf_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err);
|
||||||
char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err);
|
const char *i40evf_stat_str(struct i40e_hw *hw, i40e_status stat_err);
|
||||||
|
|
||||||
i40e_status i40evf_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
|
i40e_status i40evf_aq_get_rss_lut(struct i40e_hw *hw, u16 seid,
|
||||||
bool pf_lut, u8 *lut, u16 lut_size);
|
bool pf_lut, u8 *lut, u16 lut_size);
|
||||||
|
@ -742,15 +742,10 @@ static void i40e_receive_skb(struct i40e_ring *rx_ring,
|
|||||||
struct sk_buff *skb, u16 vlan_tag)
|
struct sk_buff *skb, u16 vlan_tag)
|
||||||
{
|
{
|
||||||
struct i40e_q_vector *q_vector = rx_ring->q_vector;
|
struct i40e_q_vector *q_vector = rx_ring->q_vector;
|
||||||
struct i40e_vsi *vsi = rx_ring->vsi;
|
|
||||||
u64 flags = vsi->back->flags;
|
|
||||||
|
|
||||||
if (vlan_tag & VLAN_VID_MASK)
|
if (vlan_tag & VLAN_VID_MASK)
|
||||||
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
|
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
|
||||||
|
|
||||||
if (flags & I40E_FLAG_IN_NETPOLL)
|
|
||||||
netif_rx(skb);
|
|
||||||
else
|
|
||||||
napi_gro_receive(&q_vector->napi, skb);
|
napi_gro_receive(&q_vector->napi, skb);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1271,7 +1266,7 @@ int i40evf_napi_poll(struct napi_struct *napi, int budget)
|
|||||||
bool clean_complete = true;
|
bool clean_complete = true;
|
||||||
bool arm_wb = false;
|
bool arm_wb = false;
|
||||||
int budget_per_ring;
|
int budget_per_ring;
|
||||||
int cleaned;
|
int work_done = 0;
|
||||||
|
|
||||||
if (test_bit(__I40E_DOWN, &vsi->state)) {
|
if (test_bit(__I40E_DOWN, &vsi->state)) {
|
||||||
napi_complete(napi);
|
napi_complete(napi);
|
||||||
@ -1287,22 +1282,31 @@ int i40evf_napi_poll(struct napi_struct *napi, int budget)
|
|||||||
ring->arm_wb = false;
|
ring->arm_wb = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Handle case where we are called by netpoll with a budget of 0 */
|
||||||
|
if (budget <= 0)
|
||||||
|
goto tx_only;
|
||||||
|
|
||||||
/* We attempt to distribute budget to each Rx queue fairly, but don't
|
/* We attempt to distribute budget to each Rx queue fairly, but don't
|
||||||
* allow the budget to go below 1 because that would exit polling early.
|
* allow the budget to go below 1 because that would exit polling early.
|
||||||
*/
|
*/
|
||||||
budget_per_ring = max(budget/q_vector->num_ringpairs, 1);
|
budget_per_ring = max(budget/q_vector->num_ringpairs, 1);
|
||||||
|
|
||||||
i40e_for_each_ring(ring, q_vector->rx) {
|
i40e_for_each_ring(ring, q_vector->rx) {
|
||||||
|
int cleaned;
|
||||||
|
|
||||||
if (ring_is_ps_enabled(ring))
|
if (ring_is_ps_enabled(ring))
|
||||||
cleaned = i40e_clean_rx_irq_ps(ring, budget_per_ring);
|
cleaned = i40e_clean_rx_irq_ps(ring, budget_per_ring);
|
||||||
else
|
else
|
||||||
cleaned = i40e_clean_rx_irq_1buf(ring, budget_per_ring);
|
cleaned = i40e_clean_rx_irq_1buf(ring, budget_per_ring);
|
||||||
|
|
||||||
|
work_done += cleaned;
|
||||||
/* if we didn't clean as many as budgeted, we must be done */
|
/* if we didn't clean as many as budgeted, we must be done */
|
||||||
clean_complete &= (budget_per_ring != cleaned);
|
clean_complete &= (budget_per_ring != cleaned);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If work not completed, return budget and polling will return */
|
/* If work not completed, return budget and polling will return */
|
||||||
if (!clean_complete) {
|
if (!clean_complete) {
|
||||||
|
tx_only:
|
||||||
if (arm_wb)
|
if (arm_wb)
|
||||||
i40evf_force_wb(vsi, q_vector);
|
i40evf_force_wb(vsi, q_vector);
|
||||||
return budget;
|
return budget;
|
||||||
@ -1312,7 +1316,7 @@ int i40evf_napi_poll(struct napi_struct *napi, int budget)
|
|||||||
q_vector->arm_wb_state = false;
|
q_vector->arm_wb_state = false;
|
||||||
|
|
||||||
/* Work is done so exit the polling mode and re-enable the interrupt */
|
/* Work is done so exit the polling mode and re-enable the interrupt */
|
||||||
napi_complete(napi);
|
napi_complete_done(napi, work_done);
|
||||||
i40e_update_enable_itr(vsi, q_vector);
|
i40e_update_enable_itr(vsi, q_vector);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -35,6 +35,7 @@
|
|||||||
#define I40E_ITR_20K 0x0019
|
#define I40E_ITR_20K 0x0019
|
||||||
#define I40E_ITR_8K 0x003E
|
#define I40E_ITR_8K 0x003E
|
||||||
#define I40E_ITR_4K 0x007A
|
#define I40E_ITR_4K 0x007A
|
||||||
|
#define I40E_MAX_INTRL 0x3B /* reg uses 4 usec resolution */
|
||||||
#define I40E_ITR_RX_DEF I40E_ITR_8K
|
#define I40E_ITR_RX_DEF I40E_ITR_8K
|
||||||
#define I40E_ITR_TX_DEF I40E_ITR_4K
|
#define I40E_ITR_TX_DEF I40E_ITR_4K
|
||||||
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
|
#define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
|
||||||
@ -44,6 +45,15 @@
|
|||||||
#define ITR_TO_REG(setting) ((setting & ~I40E_ITR_DYNAMIC) >> 1)
|
#define ITR_TO_REG(setting) ((setting & ~I40E_ITR_DYNAMIC) >> 1)
|
||||||
#define ITR_IS_DYNAMIC(setting) (!!(setting & I40E_ITR_DYNAMIC))
|
#define ITR_IS_DYNAMIC(setting) (!!(setting & I40E_ITR_DYNAMIC))
|
||||||
#define ITR_REG_TO_USEC(itr_reg) (itr_reg << 1)
|
#define ITR_REG_TO_USEC(itr_reg) (itr_reg << 1)
|
||||||
|
/* 0x40 is the enable bit for interrupt rate limiting, and must be set if
|
||||||
|
* the value of the rate limit is non-zero
|
||||||
|
*/
|
||||||
|
#define INTRL_ENA BIT(6)
|
||||||
|
#define INTRL_REG_TO_USEC(intrl) ((intrl & ~INTRL_ENA) << 2)
|
||||||
|
#define INTRL_USEC_TO_REG(set) ((set) ? ((set) >> 2) | INTRL_ENA : 0)
|
||||||
|
#define I40E_INTRL_8K 125 /* 8000 ints/sec */
|
||||||
|
#define I40E_INTRL_62K 16 /* 62500 ints/sec */
|
||||||
|
#define I40E_INTRL_83K 12 /* 83333 ints/sec */
|
||||||
|
|
||||||
#define I40E_QUEUE_END_OF_LIST 0x7FF
|
#define I40E_QUEUE_END_OF_LIST 0x7FF
|
||||||
|
|
||||||
|
@ -87,7 +87,7 @@ struct i40e_vsi {
|
|||||||
#define I40EVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
|
#define I40EVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
|
||||||
#define I40EVF_MAX_AQ_BUF_SIZE 4096
|
#define I40EVF_MAX_AQ_BUF_SIZE 4096
|
||||||
#define I40EVF_AQ_LEN 32
|
#define I40EVF_AQ_LEN 32
|
||||||
#define I40EVF_AQ_MAX_ERR 10 /* times to try before resetting AQ */
|
#define I40EVF_AQ_MAX_ERR 20 /* times to try before resetting AQ */
|
||||||
|
|
||||||
#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
|
#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
|
||||||
|
|
||||||
@ -211,7 +211,6 @@ struct i40evf_adapter {
|
|||||||
#define I40EVF_FLAG_RX_1BUF_CAPABLE BIT(1)
|
#define I40EVF_FLAG_RX_1BUF_CAPABLE BIT(1)
|
||||||
#define I40EVF_FLAG_RX_PS_CAPABLE BIT(2)
|
#define I40EVF_FLAG_RX_PS_CAPABLE BIT(2)
|
||||||
#define I40EVF_FLAG_RX_PS_ENABLED BIT(3)
|
#define I40EVF_FLAG_RX_PS_ENABLED BIT(3)
|
||||||
#define I40EVF_FLAG_IN_NETPOLL BIT(4)
|
|
||||||
#define I40EVF_FLAG_IMIR_ENABLED BIT(5)
|
#define I40EVF_FLAG_IMIR_ENABLED BIT(5)
|
||||||
#define I40EVF_FLAG_MQ_CAPABLE BIT(6)
|
#define I40EVF_FLAG_MQ_CAPABLE BIT(6)
|
||||||
#define I40EVF_FLAG_NEED_LINK_UPDATE BIT(7)
|
#define I40EVF_FLAG_NEED_LINK_UPDATE BIT(7)
|
||||||
@ -224,7 +223,6 @@ struct i40evf_adapter {
|
|||||||
/* duplicates for common code */
|
/* duplicates for common code */
|
||||||
#define I40E_FLAG_FDIR_ATR_ENABLED 0
|
#define I40E_FLAG_FDIR_ATR_ENABLED 0
|
||||||
#define I40E_FLAG_DCB_ENABLED 0
|
#define I40E_FLAG_DCB_ENABLED 0
|
||||||
#define I40E_FLAG_IN_NETPOLL I40EVF_FLAG_IN_NETPOLL
|
|
||||||
#define I40E_FLAG_RX_CSUM_ENABLED I40EVF_FLAG_RX_CSUM_ENABLED
|
#define I40E_FLAG_RX_CSUM_ENABLED I40EVF_FLAG_RX_CSUM_ENABLED
|
||||||
#define I40E_FLAG_WB_ON_ITR_CAPABLE I40EVF_FLAG_WB_ON_ITR_CAPABLE
|
#define I40E_FLAG_WB_ON_ITR_CAPABLE I40EVF_FLAG_WB_ON_ITR_CAPABLE
|
||||||
#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE
|
#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE
|
||||||
|
@ -34,7 +34,7 @@ char i40evf_driver_name[] = "i40evf";
|
|||||||
static const char i40evf_driver_string[] =
|
static const char i40evf_driver_string[] =
|
||||||
"Intel(R) XL710/X710 Virtual Function Network Driver";
|
"Intel(R) XL710/X710 Virtual Function Network Driver";
|
||||||
|
|
||||||
#define DRV_VERSION "1.3.19"
|
#define DRV_VERSION "1.3.21"
|
||||||
const char i40evf_driver_version[] = DRV_VERSION;
|
const char i40evf_driver_version[] = DRV_VERSION;
|
||||||
static const char i40evf_copyright[] =
|
static const char i40evf_copyright[] =
|
||||||
"Copyright (c) 2013 - 2015 Intel Corporation.";
|
"Copyright (c) 2013 - 2015 Intel Corporation.";
|
||||||
@ -444,6 +444,29 @@ out:
|
|||||||
return err;
|
return err;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
||||||
|
/**
|
||||||
|
* i40evf_netpoll - A Polling 'interrupt' handler
|
||||||
|
* @netdev: network interface device structure
|
||||||
|
*
|
||||||
|
* This is used by netconsole to send skbs without having to re-enable
|
||||||
|
* interrupts. It's not called while the normal interrupt routine is executing.
|
||||||
|
**/
|
||||||
|
static void i40evf_netpoll(struct net_device *netdev)
|
||||||
|
{
|
||||||
|
struct i40evf_adapter *adapter = netdev_priv(netdev);
|
||||||
|
int q_vectors = adapter->num_msix_vectors - NONQ_VECS;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
/* if interface is down do nothing */
|
||||||
|
if (test_bit(__I40E_DOWN, &adapter->vsi.state))
|
||||||
|
return;
|
||||||
|
|
||||||
|
for (i = 0; i < q_vectors; i++)
|
||||||
|
i40evf_msix_clean_rings(0, adapter->q_vector[i]);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
/**
|
/**
|
||||||
* i40evf_request_traffic_irqs - Initialize MSI-X interrupts
|
* i40evf_request_traffic_irqs - Initialize MSI-X interrupts
|
||||||
* @adapter: board private structure
|
* @adapter: board private structure
|
||||||
@ -2049,6 +2072,9 @@ static const struct net_device_ops i40evf_netdev_ops = {
|
|||||||
.ndo_tx_timeout = i40evf_tx_timeout,
|
.ndo_tx_timeout = i40evf_tx_timeout,
|
||||||
.ndo_vlan_rx_add_vid = i40evf_vlan_rx_add_vid,
|
.ndo_vlan_rx_add_vid = i40evf_vlan_rx_add_vid,
|
||||||
.ndo_vlan_rx_kill_vid = i40evf_vlan_rx_kill_vid,
|
.ndo_vlan_rx_kill_vid = i40evf_vlan_rx_kill_vid,
|
||||||
|
#ifdef CONFIG_NET_POLL_CONTROLLER
|
||||||
|
.ndo_poll_controller = i40evf_netpoll,
|
||||||
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@ -2097,7 +2123,10 @@ int i40evf_process_config(struct i40evf_adapter *adapter)
|
|||||||
|
|
||||||
if (adapter->vf_res->vf_offload_flags
|
if (adapter->vf_res->vf_offload_flags
|
||||||
& I40E_VIRTCHNL_VF_OFFLOAD_VLAN) {
|
& I40E_VIRTCHNL_VF_OFFLOAD_VLAN) {
|
||||||
netdev->vlan_features = netdev->features;
|
netdev->vlan_features = netdev->features &
|
||||||
|
~(NETIF_F_HW_VLAN_CTAG_TX |
|
||||||
|
NETIF_F_HW_VLAN_CTAG_RX |
|
||||||
|
NETIF_F_HW_VLAN_CTAG_FILTER);
|
||||||
netdev->features |= NETIF_F_HW_VLAN_CTAG_TX |
|
netdev->features |= NETIF_F_HW_VLAN_CTAG_TX |
|
||||||
NETIF_F_HW_VLAN_CTAG_RX |
|
NETIF_F_HW_VLAN_CTAG_RX |
|
||||||
NETIF_F_HW_VLAN_CTAG_FILTER;
|
NETIF_F_HW_VLAN_CTAG_FILTER;
|
||||||
@ -2315,7 +2344,7 @@ static void i40evf_init_task(struct work_struct *work)
|
|||||||
}
|
}
|
||||||
return;
|
return;
|
||||||
restart:
|
restart:
|
||||||
schedule_delayed_work(&adapter->init_task, msecs_to_jiffies(20));
|
schedule_delayed_work(&adapter->init_task, msecs_to_jiffies(30));
|
||||||
return;
|
return;
|
||||||
|
|
||||||
err_register:
|
err_register:
|
||||||
@ -2332,7 +2361,7 @@ err:
|
|||||||
adapter->flags |= I40EVF_FLAG_PF_COMMS_FAILED;
|
adapter->flags |= I40EVF_FLAG_PF_COMMS_FAILED;
|
||||||
return; /* do not reschedule */
|
return; /* do not reschedule */
|
||||||
}
|
}
|
||||||
schedule_delayed_work(&adapter->init_task, HZ / 2);
|
schedule_delayed_work(&adapter->init_task, HZ);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -151,7 +151,7 @@ static void igb_setup_dca(struct igb_adapter *);
|
|||||||
#endif /* CONFIG_IGB_DCA */
|
#endif /* CONFIG_IGB_DCA */
|
||||||
static int igb_poll(struct napi_struct *, int);
|
static int igb_poll(struct napi_struct *, int);
|
||||||
static bool igb_clean_tx_irq(struct igb_q_vector *);
|
static bool igb_clean_tx_irq(struct igb_q_vector *);
|
||||||
static bool igb_clean_rx_irq(struct igb_q_vector *, int);
|
static int igb_clean_rx_irq(struct igb_q_vector *, int);
|
||||||
static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
|
static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
|
||||||
static void igb_tx_timeout(struct net_device *);
|
static void igb_tx_timeout(struct net_device *);
|
||||||
static void igb_reset_task(struct work_struct *);
|
static void igb_reset_task(struct work_struct *);
|
||||||
@ -6364,6 +6364,7 @@ static int igb_poll(struct napi_struct *napi, int budget)
|
|||||||
struct igb_q_vector,
|
struct igb_q_vector,
|
||||||
napi);
|
napi);
|
||||||
bool clean_complete = true;
|
bool clean_complete = true;
|
||||||
|
int work_done = 0;
|
||||||
|
|
||||||
#ifdef CONFIG_IGB_DCA
|
#ifdef CONFIG_IGB_DCA
|
||||||
if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
|
if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
|
||||||
@ -6372,15 +6373,19 @@ static int igb_poll(struct napi_struct *napi, int budget)
|
|||||||
if (q_vector->tx.ring)
|
if (q_vector->tx.ring)
|
||||||
clean_complete = igb_clean_tx_irq(q_vector);
|
clean_complete = igb_clean_tx_irq(q_vector);
|
||||||
|
|
||||||
if (q_vector->rx.ring)
|
if (q_vector->rx.ring) {
|
||||||
clean_complete &= igb_clean_rx_irq(q_vector, budget);
|
int cleaned = igb_clean_rx_irq(q_vector, budget);
|
||||||
|
|
||||||
|
work_done += cleaned;
|
||||||
|
clean_complete &= (cleaned < budget);
|
||||||
|
}
|
||||||
|
|
||||||
/* If all work not completed, return budget and keep polling */
|
/* If all work not completed, return budget and keep polling */
|
||||||
if (!clean_complete)
|
if (!clean_complete)
|
||||||
return budget;
|
return budget;
|
||||||
|
|
||||||
/* If not enough Rx work done, exit the polling mode */
|
/* If not enough Rx work done, exit the polling mode */
|
||||||
napi_complete(napi);
|
napi_complete_done(napi, work_done);
|
||||||
igb_ring_irq_enable(q_vector);
|
igb_ring_irq_enable(q_vector);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@ -6904,7 +6909,7 @@ static void igb_process_skb_fields(struct igb_ring *rx_ring,
|
|||||||
skb->protocol = eth_type_trans(skb, rx_ring->netdev);
|
skb->protocol = eth_type_trans(skb, rx_ring->netdev);
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
|
static int igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
|
||||||
{
|
{
|
||||||
struct igb_ring *rx_ring = q_vector->rx.ring;
|
struct igb_ring *rx_ring = q_vector->rx.ring;
|
||||||
struct sk_buff *skb = rx_ring->skb;
|
struct sk_buff *skb = rx_ring->skb;
|
||||||
@ -6978,7 +6983,7 @@ static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, const int budget)
|
|||||||
if (cleaned_count)
|
if (cleaned_count)
|
||||||
igb_alloc_rx_buffers(rx_ring, cleaned_count);
|
igb_alloc_rx_buffers(rx_ring, cleaned_count);
|
||||||
|
|
||||||
return total_packets < budget;
|
return total_packets;
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
|
static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
|
||||||
|
@ -1211,7 +1211,7 @@ static int igbvf_poll(struct napi_struct *napi, int budget)
|
|||||||
|
|
||||||
/* If not enough Rx work done, exit the polling mode */
|
/* If not enough Rx work done, exit the polling mode */
|
||||||
if (work_done < budget) {
|
if (work_done < budget) {
|
||||||
napi_complete(napi);
|
napi_complete_done(napi, work_done);
|
||||||
|
|
||||||
if (adapter->requested_itr & 3)
|
if (adapter->requested_itr & 3)
|
||||||
igbvf_set_itr(adapter);
|
igbvf_set_itr(adapter);
|
||||||
|
@ -2775,7 +2775,7 @@ int ixgbe_poll(struct napi_struct *napi, int budget)
|
|||||||
container_of(napi, struct ixgbe_q_vector, napi);
|
container_of(napi, struct ixgbe_q_vector, napi);
|
||||||
struct ixgbe_adapter *adapter = q_vector->adapter;
|
struct ixgbe_adapter *adapter = q_vector->adapter;
|
||||||
struct ixgbe_ring *ring;
|
struct ixgbe_ring *ring;
|
||||||
int per_ring_budget;
|
int per_ring_budget, work_done = 0;
|
||||||
bool clean_complete = true;
|
bool clean_complete = true;
|
||||||
|
|
||||||
#ifdef CONFIG_IXGBE_DCA
|
#ifdef CONFIG_IXGBE_DCA
|
||||||
@ -2796,9 +2796,13 @@ int ixgbe_poll(struct napi_struct *napi, int budget)
|
|||||||
else
|
else
|
||||||
per_ring_budget = budget;
|
per_ring_budget = budget;
|
||||||
|
|
||||||
ixgbe_for_each_ring(ring, q_vector->rx)
|
ixgbe_for_each_ring(ring, q_vector->rx) {
|
||||||
clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
|
int cleaned = ixgbe_clean_rx_irq(q_vector, ring,
|
||||||
per_ring_budget) < per_ring_budget);
|
per_ring_budget);
|
||||||
|
|
||||||
|
work_done += cleaned;
|
||||||
|
clean_complete &= (cleaned < per_ring_budget);
|
||||||
|
}
|
||||||
|
|
||||||
ixgbe_qv_unlock_napi(q_vector);
|
ixgbe_qv_unlock_napi(q_vector);
|
||||||
/* If all work not completed, return budget and keep polling */
|
/* If all work not completed, return budget and keep polling */
|
||||||
@ -2806,7 +2810,7 @@ int ixgbe_poll(struct napi_struct *napi, int budget)
|
|||||||
return budget;
|
return budget;
|
||||||
|
|
||||||
/* all work done, exit the polling mode */
|
/* all work done, exit the polling mode */
|
||||||
napi_complete(napi);
|
napi_complete_done(napi, work_done);
|
||||||
if (adapter->rx_itr_setting & 1)
|
if (adapter->rx_itr_setting & 1)
|
||||||
ixgbe_set_itr(q_vector);
|
ixgbe_set_itr(q_vector);
|
||||||
if (!test_bit(__IXGBE_DOWN, &adapter->state))
|
if (!test_bit(__IXGBE_DOWN, &adapter->state))
|
||||||
|
@ -1008,7 +1008,7 @@ static int ixgbevf_poll(struct napi_struct *napi, int budget)
|
|||||||
container_of(napi, struct ixgbevf_q_vector, napi);
|
container_of(napi, struct ixgbevf_q_vector, napi);
|
||||||
struct ixgbevf_adapter *adapter = q_vector->adapter;
|
struct ixgbevf_adapter *adapter = q_vector->adapter;
|
||||||
struct ixgbevf_ring *ring;
|
struct ixgbevf_ring *ring;
|
||||||
int per_ring_budget;
|
int per_ring_budget, work_done = 0;
|
||||||
bool clean_complete = true;
|
bool clean_complete = true;
|
||||||
|
|
||||||
ixgbevf_for_each_ring(ring, q_vector->tx)
|
ixgbevf_for_each_ring(ring, q_vector->tx)
|
||||||
@ -1027,10 +1027,12 @@ static int ixgbevf_poll(struct napi_struct *napi, int budget)
|
|||||||
else
|
else
|
||||||
per_ring_budget = budget;
|
per_ring_budget = budget;
|
||||||
|
|
||||||
ixgbevf_for_each_ring(ring, q_vector->rx)
|
ixgbevf_for_each_ring(ring, q_vector->rx) {
|
||||||
clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring,
|
int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
|
||||||
per_ring_budget)
|
per_ring_budget);
|
||||||
< per_ring_budget);
|
work_done += cleaned;
|
||||||
|
clean_complete &= (cleaned < per_ring_budget);
|
||||||
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_NET_RX_BUSY_POLL
|
#ifdef CONFIG_NET_RX_BUSY_POLL
|
||||||
ixgbevf_qv_unlock_napi(q_vector);
|
ixgbevf_qv_unlock_napi(q_vector);
|
||||||
@ -1040,7 +1042,7 @@ static int ixgbevf_poll(struct napi_struct *napi, int budget)
|
|||||||
if (!clean_complete)
|
if (!clean_complete)
|
||||||
return budget;
|
return budget;
|
||||||
/* all work done, exit the polling mode */
|
/* all work done, exit the polling mode */
|
||||||
napi_complete(napi);
|
napi_complete_done(napi, work_done);
|
||||||
if (adapter->rx_itr_setting & 1)
|
if (adapter->rx_itr_setting & 1)
|
||||||
ixgbevf_set_itr(q_vector);
|
ixgbevf_set_itr(q_vector);
|
||||||
if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
|
if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
|
||||||
|
Loading…
Reference in New Issue
Block a user