forked from Minki/linux
drm/i915: Always call the adjusted mode 'adjusted_mode'
Always name any variable pointing at the adjusted mode as 'adjustead_mode'. This will make it much easier to identify when we should use the crtc_ timings and when we shoudln't. Conversion was performed with coccinelle: @@ expression E; identifier I; @@ - struct drm_display_mode *I = &E.adjusted_mode; + struct drm_display_mode *adjusted_mode = &E.adjusted_mode; <... - I + adjusted_mode ...> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> [danvet: Fixup conflicts.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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28694070d8
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124abe076f
@ -396,7 +396,7 @@ void intel_audio_codec_enable(struct intel_encoder *intel_encoder)
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{
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struct drm_encoder *encoder = &intel_encoder->base;
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struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
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struct drm_display_mode *mode = &crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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struct drm_connector *connector;
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -419,10 +419,11 @@ void intel_audio_codec_enable(struct intel_encoder *intel_encoder)
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if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))
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connector->eld[5] |= (1 << 2);
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connector->eld[6] = drm_av_sync_delay(connector, mode) / 2;
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connector->eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
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if (dev_priv->display.audio_codec_enable)
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dev_priv->display.audio_codec_enable(connector, intel_encoder, mode);
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dev_priv->display.audio_codec_enable(connector, intel_encoder,
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adjusted_mode);
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if (acomp && acomp->audio_ops && acomp->audio_ops->pin_eld_notify)
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acomp->audio_ops->pin_eld_notify(acomp->audio_ops->audio_ptr, (int) port);
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@ -4392,8 +4392,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
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int skl_update_scaler_crtc(struct intel_crtc_state *state)
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{
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struct intel_crtc *intel_crtc = to_intel_crtc(state->base.crtc);
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struct drm_display_mode *adjusted_mode =
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&state->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &state->base.adjusted_mode;
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DRM_DEBUG_KMS("Updating scaler for [CRTC:%i] scaler_user index %u.%u\n",
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intel_crtc->base.base.id, intel_crtc->pipe, SKL_CRTC_INDEX);
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@ -7625,8 +7624,7 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
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struct drm_i915_private *dev_priv = dev->dev_private;
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enum pipe pipe = intel_crtc->pipe;
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enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
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struct drm_display_mode *adjusted_mode =
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&intel_crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
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uint32_t crtc_vtotal, crtc_vblank_end;
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int vsyncshift = 0;
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@ -12821,11 +12819,11 @@ static void update_scanline_offset(struct intel_crtc *crtc)
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* one to the value.
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*/
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if (IS_GEN2(dev)) {
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const struct drm_display_mode *mode = &crtc->config->base.adjusted_mode;
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const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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int vtotal;
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vtotal = mode->crtc_vtotal;
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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vtotal = adjusted_mode->crtc_vtotal;
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if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
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vtotal /= 2;
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crtc->scanline_offset = vtotal - 1;
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@ -774,8 +774,7 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
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struct drm_display_mode *adjusted_mode =
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&intel_crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
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enum port port;
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unsigned int bpp = intel_crtc->config->pipe_bpp;
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u32 val, tmp;
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@ -880,14 +879,14 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder)
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intel_dsi->video_mode_format == VIDEO_MODE_BURST) {
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I915_WRITE(MIPI_HS_TX_TIMEOUT(port),
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txbyteclkhs(adjusted_mode->htotal, bpp,
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intel_dsi->lane_count,
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intel_dsi->burst_mode_ratio) + 1);
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intel_dsi->lane_count,
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intel_dsi->burst_mode_ratio) + 1);
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} else {
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I915_WRITE(MIPI_HS_TX_TIMEOUT(port),
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txbyteclkhs(adjusted_mode->vtotal *
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adjusted_mode->htotal,
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bpp, intel_dsi->lane_count,
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intel_dsi->burst_mode_ratio) + 1);
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adjusted_mode->htotal,
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bpp, intel_dsi->lane_count,
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intel_dsi->burst_mode_ratio) + 1);
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}
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I915_WRITE(MIPI_LP_RX_TIMEOUT(port), intel_dsi->lp_rx_timeout);
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I915_WRITE(MIPI_TURN_AROUND_TIMEOUT(port),
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@ -1537,8 +1537,7 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
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{
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struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
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struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
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struct drm_display_mode *adjusted_mode =
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&intel_crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
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intel_hdmi_prepare(encoder);
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@ -1555,8 +1554,7 @@ static void vlv_hdmi_pre_enable(struct intel_encoder *encoder)
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc =
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to_intel_crtc(encoder->base.crtc);
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struct drm_display_mode *adjusted_mode =
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&intel_crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
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enum dpio_channel port = vlv_dport_to_channel(dport);
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int pipe = intel_crtc->pipe;
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u32 val;
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@ -1822,8 +1820,7 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder)
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc =
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to_intel_crtc(encoder->base.crtc);
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struct drm_display_mode *adjusted_mode =
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&intel_crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
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enum dpio_channel ch = vlv_dport_to_channel(dport);
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int pipe = intel_crtc->pipe;
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int data, i, stagger;
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@ -139,8 +139,7 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder)
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struct drm_device *dev = encoder->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
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const struct drm_display_mode *adjusted_mode =
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&crtc->config->base.adjusted_mode;
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const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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int pipe = crtc->pipe;
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u32 temp;
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@ -1502,8 +1502,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
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if (crtc) {
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/* self-refresh has much higher latency */
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static const int sr_latency_ns = 12000;
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const struct drm_display_mode *adjusted_mode =
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&to_intel_crtc(crtc)->config->base.adjusted_mode;
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const struct drm_display_mode *adjusted_mode = &to_intel_crtc(crtc)->config->base.adjusted_mode;
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int clock = adjusted_mode->crtc_clock;
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int htotal = adjusted_mode->crtc_htotal;
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int hdisplay = to_intel_crtc(crtc)->config->pipe_src_w;
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@ -1650,8 +1649,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
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if (HAS_FW_BLC(dev) && enabled) {
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/* self-refresh has much higher latency */
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static const int sr_latency_ns = 6000;
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const struct drm_display_mode *adjusted_mode =
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&to_intel_crtc(enabled)->config->base.adjusted_mode;
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const struct drm_display_mode *adjusted_mode = &to_intel_crtc(enabled)->config->base.adjusted_mode;
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int clock = adjusted_mode->crtc_clock;
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int htotal = adjusted_mode->crtc_htotal;
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int hdisplay = to_intel_crtc(enabled)->config->pipe_src_w;
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@ -2088,7 +2086,7 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct drm_display_mode *mode = &intel_crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;
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u32 linetime, ips_linetime;
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if (!intel_crtc->active)
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@ -2097,9 +2095,9 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
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/* The WM are computed with base on how long it takes to fill a single
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* row at the given clock rate, multiplied by 8.
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* */
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linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
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mode->crtc_clock);
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ips_linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
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linetime = DIV_ROUND_CLOSEST(adjusted_mode->crtc_htotal * 1000 * 8,
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adjusted_mode->crtc_clock);
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ips_linetime = DIV_ROUND_CLOSEST(adjusted_mode->crtc_htotal * 1000 * 8,
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dev_priv->cdclk_freq);
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return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) |
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@ -1189,8 +1189,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder)
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struct drm_device *dev = intel_encoder->base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
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struct drm_display_mode *adjusted_mode =
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&crtc->config->base.adjusted_mode;
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struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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struct drm_display_mode *mode = &crtc->config->base.mode;
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struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
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u32 sdvox;
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@ -79,19 +79,19 @@ static int usecs_to_scanlines(const struct drm_display_mode *mode, int usecs)
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void intel_pipe_update_start(struct intel_crtc *crtc)
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{
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struct drm_device *dev = crtc->base.dev;
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const struct drm_display_mode *mode = &crtc->config->base.adjusted_mode;
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const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
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enum pipe pipe = crtc->pipe;
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long timeout = msecs_to_jiffies_timeout(1);
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int scanline, min, max, vblank_start;
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wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
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DEFINE_WAIT(wait);
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vblank_start = mode->crtc_vblank_start;
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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vblank_start = adjusted_mode->crtc_vblank_start;
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if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
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vblank_start = DIV_ROUND_UP(vblank_start, 2);
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/* FIXME needs to be calibrated sensibly */
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min = vblank_start - usecs_to_scanlines(mode, 100);
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min = vblank_start - usecs_to_scanlines(adjusted_mode, 100);
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max = vblank_start - 1;
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local_irq_disable();
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