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Merge tag 'omap-for-v3.8/fixes-non-critical-v4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical

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From Tony Lindgren <tony@atomide.com>:

Non critical omap fixes that were not considered urgent
for the -rc cycle.

* tag 'omap-for-v3.8/fixes-non-critical-v4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (645 commits)
  ARM: OMAP4: PM: fix errata handling when CONFIG_PM=n
  ARM: OMAP4: retrigger localtimers after re-enabling gic
  ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC control register change.
  ARM: OMAP4: PM: add errata support

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2012-11-15 17:27:43 +01:00
parent 6c8e94a57c 9364073587
commit 12480c2e53
631 changed files with 7942 additions and 5041 deletions
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27
arch/arm/include/debug/8250_32.S Normal file
View File

@@ -0,0 +1,27 @@
/*
* Copyright (c) 2011 Picochip Ltd., Jamie Iles
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
* accesses to the 8250.
*/
#include <linux/serial_reg.h>
.macro senduart,rd,rx
str \rd, [\rx, #UART_TX << UART_SHIFT]
.endm
.macro busyuart,rd,rx
1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
bne 1002b
.endm
/* The UART's don't have any flow control IO's wired up. */
.macro waituart,rd,rx
.endm

18
arch/arm/include/debug/picoxcell.S
View File

@@ -5,10 +5,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
* accesses to the 8250.
*/
#include <linux/serial_reg.h>
#define UART_SHIFT 2
#define PICOXCELL_UART1_BASE 0x80230000
@@ -19,17 +16,4 @@
ldr \rp, =PICOXCELL_UART1_BASE
.endm
.macro senduart,rd,rx
str \rd, [\rx, #UART_TX << UART_SHIFT]
.endm
.macro busyuart,rd,rx
1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
bne 1002b
.endm
/* The UART's don't have any flow control IO's wired up. */
.macro waituart,rd,rx
.endm
#include "8250_32.S"

5
arch/arm/include/debug/socfpga.S
View File

@@ -7,6 +7,9 @@
* published by the Free Software Foundation.
*/
#define UART_SHIFT 2
#define DEBUG_LL_UART_OFFSET 0x00002000
.macro addruart, rp, rv, tmp
mov \rp, #DEBUG_LL_UART_OFFSET
orr \rp, \rp, #0x00c00000
@@ -14,3 +17,5 @@
orr \rp, \rp, #0xff000000 @ physical base
.endm
#include "8250_32.S"