MIPS: Use the new "ZC" constraint for MIPS R6
GCC versions supporting MIPS R6 use the ZC constraint to enforce a 9-bit offset for MIPS R6. We will use that for all MIPS R6 LL/SC instructions. Cc: Matthew Fortune <Matthew.Fortune@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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@ -16,13 +16,18 @@
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#define GCC_REG_ACCUM "accum"
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#define GCC_REG_ACCUM "accum"
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#endif
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#endif
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#ifdef CONFIG_CPU_MIPSR6
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/* All MIPS R6 toolchains support the ZC constrain */
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#define GCC_OFF_SMALL_ASM() "ZC"
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#else
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#ifndef CONFIG_CPU_MICROMIPS
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#ifndef CONFIG_CPU_MICROMIPS
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#define GCC_OFF_SMALL_ASM() "R"
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#define GCC_OFF_SMALL_ASM() "R"
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#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
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#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
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#define GCC_OFF_SMALL_ASM() "ZC"
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#define GCC_OFF_SMALL_ASM() "ZC"
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#else
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#else
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#error "microMIPS compilation unsupported with GCC older than 4.9"
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#error "microMIPS compilation unsupported with GCC older than 4.9"
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#endif
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#endif /* CONFIG_CPU_MICROMIPS */
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#endif /* CONFIG_CPU_MIPSR6 */
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#ifdef CONFIG_CPU_MIPSR6
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#ifdef CONFIG_CPU_MIPSR6
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#define MIPS_ISA_LEVEL "mips64r6"
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#define MIPS_ISA_LEVEL "mips64r6"
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