forked from Minki/linux
rtw89: coex: Add logic to parsing rtl8852c firmware type ctrl report
Add a part of logic to parse type of ctrl report from firmware, and remove Bluetooth packet counter count from driver, the feature was moved to firmware at rtl8852c. Signed-off-by: Ching-Te Ku <ku920601@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220725023509.43114-4-pkshih@realtek.com
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ba787c07ca
commit
1162584c79
@ -876,7 +876,9 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
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struct rtw89_btc_dm *dm = &btc->dm;
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struct rtw89_btc_rpt_cmn_info *pcinfo = NULL;
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struct rtw89_btc_wl_info *wl = &btc->cx.wl;
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struct rtw89_btc_fbtc_rpt_ctrl *prpt = NULL;
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struct rtw89_btc_bt_info *bt = &btc->cx.bt;
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struct rtw89_btc_fbtc_rpt_ctrl *prpt;
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struct rtw89_btc_fbtc_rpt_ctrl_v1 *prpt_v1;
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struct rtw89_btc_fbtc_cysta *pcysta_le32 = NULL;
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struct rtw89_btc_fbtc_cysta_cpu pcysta[1];
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struct rtw89_btc_prpt *btc_prpt = NULL;
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@ -907,8 +909,13 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
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switch (rpt_type) {
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case BTC_RPT_TYPE_CTRL:
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pcinfo = &pfwinfo->rpt_ctrl.cinfo;
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if (chip->chip_id == RTL8852A) {
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pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo);
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pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo);
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} else {
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pfinfo = (u8 *)(&pfwinfo->rpt_ctrl.finfo_v1);
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pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo_v1);
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}
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pcinfo->req_fver = chip->fcxbtcrpt_ver;
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pcinfo->rx_len = rpt_len;
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pcinfo->rx_cnt++;
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@ -1127,12 +1134,12 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
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_chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, (u32)pcysta->cycles);
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}
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if (rpt_type == BTC_RPT_TYPE_CTRL) {
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if (rpt_type == BTC_RPT_TYPE_CTRL && chip->chip_id == RTL8852A) {
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prpt = &pfwinfo->rpt_ctrl.finfo;
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btc->fwinfo.rpt_en_map = prpt->rpt_enable;
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wl->ver_info.fw_coex = prpt->wl_fw_coex_ver;
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wl->ver_info.fw = prpt->wl_fw_ver;
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dm->wl_fw_cx_offload = !!(prpt->wl_fw_cx_offload);
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dm->wl_fw_cx_offload = !!prpt->wl_fw_cx_offload;
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_chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE,
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pfwinfo->event[BTF_EVNT_RPT]);
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@ -1145,6 +1152,33 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
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btc->cx.cnt_bt[BTC_BCNT_POLUT] =
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rtw89_mac_get_plt_cnt(rtwdev, RTW89_MAC_0);
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}
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} else if (rpt_type == BTC_RPT_TYPE_CTRL) {
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prpt_v1 = &pfwinfo->rpt_ctrl.finfo_v1;
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btc->fwinfo.rpt_en_map = le32_to_cpu(prpt_v1->rpt_info.en);
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wl->ver_info.fw_coex = le32_to_cpu(prpt_v1->wl_fw_info.cx_ver);
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wl->ver_info.fw = le32_to_cpu(prpt_v1->wl_fw_info.fw_ver);
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dm->wl_fw_cx_offload = !!le32_to_cpu(prpt_v1->wl_fw_info.cx_offload);
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for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
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memcpy(&dm->gnt.band[i], &prpt_v1->gnt_val[i],
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sizeof(dm->gnt.band[i]));
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btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_TX]);
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btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_RX]);
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btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_TX]);
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btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_RX]);
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btc->cx.cnt_bt[BTC_BCNT_POLUT] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_POLLUTED]);
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_chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0);
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_chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE,
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pfwinfo->event[BTF_EVNT_RPT]);
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if (le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0)
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bt->rfk_info.map.timeout = 1;
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else
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bt->rfk_info.map.timeout = 0;
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dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
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}
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if (rpt_type >= BTC_RPT_TYPE_BT_VER &&
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@ -808,7 +808,7 @@ struct rtw89_mac_ax_gnt {
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u8 gnt_bt;
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u8 gnt_wl_sw_en;
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u8 gnt_wl;
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};
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} __packed;
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#define RTW89_MAC_AX_COEX_GNT_NR 2
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struct rtw89_mac_ax_coex_gnt {
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@ -1375,13 +1375,18 @@ struct rtw89_btc_fbtc_tdma {
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#define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/
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#define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */
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enum rtw89_btc_bt_rfk_counter {
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enum rtw89_btc_bt_sta_counter {
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BTC_BCNT_RFK_REQ = 0,
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BTC_BCNT_RFK_GO = 1,
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BTC_BCNT_RFK_REJECT = 2,
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BTC_BCNT_RFK_FAIL = 3,
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BTC_BCNT_RFK_TIMEOUT = 4,
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BTC_BCNT_RFK_MAX
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BTC_BCNT_HI_TX = 5,
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BTC_BCNT_HI_RX = 6,
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BTC_BCNT_LO_TX = 7,
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BTC_BCNT_LO_RX = 8,
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BTC_BCNT_POLLUTED = 9,
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BTC_BCNT_STA_MAX
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};
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struct rtw89_btc_fbtc_rpt_ctrl {
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@ -1398,11 +1403,56 @@ struct rtw89_btc_fbtc_rpt_ctrl {
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u32 mb_a2dp_empty_cnt; /* a2dp empty count */
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u32 mb_a2dp_flct_cnt; /* a2dp empty flow control counter */
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u32 mb_a2dp_full_cnt; /* a2dp empty full counter */
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u32 bt_rfk_cnt[BTC_BCNT_RFK_MAX];
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u32 bt_rfk_cnt[BTC_BCNT_HI_TX];
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u32 c2h_cnt; /* fw send c2h counter */
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u32 h2c_cnt; /* fw recv h2c counter */
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} __packed;
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struct rtw89_btc_fbtc_rpt_ctrl_info {
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__le32 cnt; /* fw report counter */
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__le32 en; /* report map */
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__le32 para; /* not used */
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__le32 cnt_c2h; /* fw send c2h counter */
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__le32 cnt_h2c; /* fw recv h2c counter */
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__le32 len_c2h; /* The total length of the last C2H */
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__le32 cnt_aoac_rf_on; /* rf-on counter for aoac switch notify */
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__le32 cnt_aoac_rf_off; /* rf-off counter for aoac switch notify */
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} __packed;
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struct rtw89_btc_fbtc_rpt_ctrl_wl_fw_info {
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__le32 cx_ver; /* match which driver's coex version */
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__le32 cx_offload;
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__le32 fw_ver;
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} __packed;
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struct rtw89_btc_fbtc_rpt_ctrl_a2dp_empty {
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__le32 cnt_empty; /* a2dp empty count */
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__le32 cnt_flowctrl; /* a2dp empty flow control counter */
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__le32 cnt_tx;
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__le32 cnt_ack;
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__le32 cnt_nack;
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} __packed;
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struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox {
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__le32 cnt_send_ok; /* fw send mailbox ok counter */
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__le32 cnt_send_fail; /* fw send mailbox fail counter */
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__le32 cnt_recv; /* fw recv mailbox counter */
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struct rtw89_btc_fbtc_rpt_ctrl_a2dp_empty a2dp;
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} __packed;
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struct rtw89_btc_fbtc_rpt_ctrl_v1 {
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u8 fver;
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u8 rsvd;
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__le16 rsvd1;
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struct rtw89_btc_fbtc_rpt_ctrl_info rpt_info;
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struct rtw89_btc_fbtc_rpt_ctrl_wl_fw_info wl_fw_info;
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struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info;
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__le32 bt_cnt[BTC_BCNT_STA_MAX];
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struct rtw89_mac_ax_gnt gnt_val[RTW89_PHY_MAX];
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} __packed;
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enum rtw89_fbtc_ext_ctrl_type {
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CXECTL_OFF = 0x0, /* tdma off */
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CXECTL_B2 = 0x1, /* allow B2 (beacon-early) */
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@ -1706,7 +1756,10 @@ struct rtw89_btc_rpt_cmn_info {
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struct rtw89_btc_report_ctrl_state {
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struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */
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struct rtw89_btc_fbtc_rpt_ctrl finfo; /* info from fw */
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union {
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struct rtw89_btc_fbtc_rpt_ctrl finfo; /* info from fw for 52A*/
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struct rtw89_btc_fbtc_rpt_ctrl_v1 finfo_v1; /* info from fw for 52C*/
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};
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};
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struct rtw89_btc_rpt_fbtc_tdma {
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@ -2793,23 +2793,7 @@ void rtw8852c_btc_bt_aci_imp(struct rtw89_dev *rtwdev)
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static
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void rtw8852c_btc_update_bt_cnt(struct rtw89_dev *rtwdev)
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{
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struct rtw89_btc *btc = &rtwdev->btc;
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struct rtw89_btc_cx *cx = &btc->cx;
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u32 val;
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val = rtw89_read32(rtwdev, R_BTC_BT_CNT_HIGH);
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cx->cnt_bt[BTC_BCNT_HIPRI_TX] = FIELD_GET(B_AX_STATIS_BT_HI_TX_MASK, val);
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cx->cnt_bt[BTC_BCNT_HIPRI_RX] = FIELD_GET(B_AX_STATIS_BT_HI_RX_MASK, val);
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val = rtw89_read32(rtwdev, R_BTC_BT_CNT_LOW);
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cx->cnt_bt[BTC_BCNT_LOPRI_TX] = FIELD_GET(B_AX_STATIS_BT_LO_TX_1_MASK, val);
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cx->cnt_bt[BTC_BCNT_LOPRI_RX] = FIELD_GET(B_AX_STATIS_BT_LO_RX_1_MASK, val);
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/* clock-gate off before reset counter*/
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rtw89_write32_set(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G);
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rtw89_write32_clr(rtwdev, R_AX_BT_CNT_CFG, B_AX_BT_CNT_RST);
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rtw89_write32_set(rtwdev, R_AX_BT_CNT_CFG, B_AX_BT_CNT_RST);
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rtw89_write32_clr(rtwdev, R_AX_BTC_CFG, B_AX_DIS_BTC_CLK_G);
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/* Feature move to firmware */
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}
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static
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